diff mbox series

[3/3] net/hns3: check max SIMD bitwidth

Message ID 1618458722-31558-4-git-send-email-humin29@huawei.com (mailing list archive)
State Accepted
Delegated to: Ferruh Yigit
Headers show
Series some features about hns3 PMD | expand

Checks

Context Check Description
ci/iol-testing fail Testing issues
ci/intel-Testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/checkpatch success coding style OK

Commit Message

Min Hu (Connor) April 15, 2021, 3:52 a.m. UTC
From: Chengwen Feng <fengchengwen@huawei.com>

This patch supports check max SIMD bitwidth when choosing NEON and SVE
vector path.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
 drivers/net/hns3/hns3_rxtx.c | 5 +++++
 1 file changed, 5 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index c29c0cf..85ee67a 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -13,6 +13,7 @@ 
 #include <rte_malloc.h>
 #if defined(RTE_ARCH_ARM64)
 #include <rte_cpuflags.h>
+#include <rte_vect.h>
 #endif
 
 #include "hns3_ethdev.h"
@@ -2788,6 +2789,8 @@  static bool
 hns3_get_default_vec_support(void)
 {
 #if defined(RTE_ARCH_ARM64)
+	if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128)
+		return false;
 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
 		return true;
 #endif
@@ -2798,6 +2801,8 @@  static bool
 hns3_get_sve_support(void)
 {
 #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE)
+	if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_256)
+		return false;
 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SVE))
 		return true;
 #endif