From patchwork Tue Apr 13 13:47:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "humin (Q)" X-Patchwork-Id: 91254 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 03DB3A0524; Tue, 13 Apr 2021 15:47:30 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D0A5B160FD5; Tue, 13 Apr 2021 15:47:11 +0200 (CEST) Received: from szxga06-in.huawei.com (szxga06-in.huawei.com [45.249.212.32]) by mails.dpdk.org (Postfix) with ESMTP id D4A32160FC5 for ; Tue, 13 Apr 2021 15:47:06 +0200 (CEST) Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.59]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4FKRgY3VXCzlXpd for ; Tue, 13 Apr 2021 21:45:13 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.498.0; Tue, 13 Apr 2021 21:47:02 +0800 From: "Min Hu (Connor)" To: CC: Date: Tue, 13 Apr 2021 21:47:19 +0800 Message-ID: <1618321639-57642-10-git-send-email-humin29@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1618321639-57642-1-git-send-email-humin29@huawei.com> References: <1618321639-57642-1-git-send-email-humin29@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Subject: [dpdk-dev] [PATCH 9/9] net/hns3: add the configuration of fixed speed X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Huisong Li This patch adds the configuration of fixed speed for the PF device. Signed-off-by: Huisong Li Signed-off-by: Min Hu (Connor) --- drivers/net/hns3/hns3_ethdev.c | 144 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 135 insertions(+), 9 deletions(-) diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index 6262bf0..d5e2901 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2473,12 +2473,6 @@ hns3_dev_configure(struct rte_eth_dev *dev) } hw->adapter_state = HNS3_NIC_CONFIGURING; - if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { - hns3_err(hw, "setting link speed/duplex not supported"); - ret = -EINVAL; - goto cfg_err; - } - if ((uint32_t)mq_mode & ETH_MQ_RX_DCB_FLAG) { ret = hns3_check_dcb_cfg(dev); if (ret) @@ -5271,6 +5265,130 @@ hns3_uninit_pf(struct rte_eth_dev *eth_dev) hw->io_base = NULL; } +static uint32_t +hns3_convert_link_speeds2bitmap_copper(uint32_t link_speeds) +{ + uint32_t speed_bit; + + switch (link_speeds & ~ETH_LINK_SPEED_FIXED) { + case ETH_LINK_SPEED_10M: + speed_bit = HNS3_PHY_LINK_SPEED_10M_BIT; + break; + case ETH_LINK_SPEED_10M_HD: + speed_bit = HNS3_PHY_LINK_SPEED_10M_HD_BIT; + break; + case ETH_LINK_SPEED_100M: + speed_bit = HNS3_PHY_LINK_SPEED_100M_BIT; + break; + case ETH_LINK_SPEED_100M_HD: + speed_bit = HNS3_PHY_LINK_SPEED_100M_HD_BIT; + break; + case ETH_LINK_SPEED_1G: + speed_bit = HNS3_PHY_LINK_SPEED_1000M_BIT; + break; + default: + speed_bit = 0; + break; + } + + return speed_bit; +} + +static uint32_t +hns3_convert_link_speeds2bitmap_fiber(uint32_t link_speeds) +{ + uint32_t speed_bit; + + switch (link_speeds & ~ETH_LINK_SPEED_FIXED) { + case ETH_LINK_SPEED_1G: + speed_bit = HNS3_FIBER_LINK_SPEED_1G_BIT; + break; + case ETH_LINK_SPEED_10G: + speed_bit = HNS3_FIBER_LINK_SPEED_10G_BIT; + break; + case ETH_LINK_SPEED_25G: + speed_bit = HNS3_FIBER_LINK_SPEED_25G_BIT; + break; + case ETH_LINK_SPEED_40G: + speed_bit = HNS3_FIBER_LINK_SPEED_40G_BIT; + break; + case ETH_LINK_SPEED_50G: + speed_bit = HNS3_FIBER_LINK_SPEED_50G_BIT; + break; + case ETH_LINK_SPEED_100G: + speed_bit = HNS3_FIBER_LINK_SPEED_100G_BIT; + break; + case ETH_LINK_SPEED_200G: + speed_bit = HNS3_FIBER_LINK_SPEED_200G_BIT; + break; + default: + speed_bit = 0; + break; + } + + return speed_bit; +} + +static int +hns3_check_port_speed(struct hns3_hw *hw, uint32_t link_speeds) +{ + struct hns3_mac *mac = &hw->mac; + uint32_t supported_speed = mac->supported_speed; + uint32_t speed_bit = 0; + + if (mac->media_type == HNS3_MEDIA_TYPE_COPPER) + speed_bit = hns3_convert_link_speeds2bitmap_copper(link_speeds); + else if (mac->media_type == HNS3_MEDIA_TYPE_FIBER) + speed_bit = hns3_convert_link_speeds2bitmap_fiber(link_speeds); + + if (!(speed_bit & supported_speed)) { + hns3_err(hw, "link_speeds(0x%x) exceeds the supported speed capability or is incorrect.", + link_speeds); + return -EINVAL; + } + + return 0; +} + +static inline uint32_t +hns3_get_link_speed(uint32_t link_speeds) +{ + uint32_t speed = ETH_SPEED_NUM_NONE; + + if (link_speeds & ETH_LINK_SPEED_10M || + link_speeds & ETH_LINK_SPEED_10M_HD) + speed = ETH_SPEED_NUM_10M; + if (link_speeds & ETH_LINK_SPEED_100M || + link_speeds & ETH_LINK_SPEED_100M_HD) + speed = ETH_SPEED_NUM_100M; + if (link_speeds & ETH_LINK_SPEED_1G) + speed = ETH_SPEED_NUM_1G; + if (link_speeds & ETH_LINK_SPEED_10G) + speed = ETH_SPEED_NUM_10G; + if (link_speeds & ETH_LINK_SPEED_25G) + speed = ETH_SPEED_NUM_25G; + if (link_speeds & ETH_LINK_SPEED_40G) + speed = ETH_SPEED_NUM_40G; + if (link_speeds & ETH_LINK_SPEED_50G) + speed = ETH_SPEED_NUM_50G; + if (link_speeds & ETH_LINK_SPEED_100G) + speed = ETH_SPEED_NUM_100G; + if (link_speeds & ETH_LINK_SPEED_200G) + speed = ETH_SPEED_NUM_200G; + + return speed; +} + +static uint8_t +hns3_get_link_duplex(uint32_t link_speeds) +{ + if ((link_speeds & ETH_LINK_SPEED_10M_HD) || + (link_speeds & ETH_LINK_SPEED_100M_HD)) + return ETH_LINK_HALF_DUPLEX; + else + return ETH_LINK_FULL_DUPLEX; +} + static int hns3_set_copper_port_link_speed(struct hns3_hw *hw, struct hns3_set_link_speed_cfg *cfg) @@ -5298,6 +5416,9 @@ hns3_set_copper_port_link_speed(struct hns3_hw *hw, HNS3_PHY_LINK_SPEED_100M_BIT | HNS3_PHY_LINK_SPEED_100M_HD_BIT | HNS3_PHY_LINK_SPEED_1000M_BIT; + } else { + req->speed = cfg->speed; + req->duplex = cfg->duplex; } return hns3_cmd_send(hw, desc, HNS3_PHY_PARAM_CFG_BD_NUM); @@ -5358,7 +5479,7 @@ hns3_set_fiber_port_link_speed(struct hns3_hw *hw, return 0; } - return 0; + return hns3_cfg_mac_speed_dup(hw, cfg->speed, cfg->duplex); } static int @@ -5397,13 +5518,18 @@ hns3_apply_link_speed(struct hns3_hw *hw) { struct rte_eth_conf *conf = &hw->data->dev_conf; struct hns3_set_link_speed_cfg cfg; + int ret; memset(&cfg, 0, sizeof(struct hns3_set_link_speed_cfg)); cfg.autoneg = (conf->link_speeds == ETH_LINK_SPEED_AUTONEG) ? ETH_LINK_AUTONEG : ETH_LINK_FIXED; if (cfg.autoneg != ETH_LINK_AUTONEG) { - hns3_err(hw, "device doesn't support to force link speed."); - return -EOPNOTSUPP; + ret = hns3_check_port_speed(hw, conf->link_speeds); + if (ret) + return ret; + + cfg.speed = hns3_get_link_speed(conf->link_speeds); + cfg.duplex = hns3_get_link_duplex(conf->link_speeds); } return hns3_set_port_link_speed(hw, &cfg);