@@ -728,6 +728,8 @@ struct mlx5_devx_obj *
attr->log_max_pd = MLX5_GET(cmd_hca_cap, hcattr, log_max_pd);
attr->log_max_srq = MLX5_GET(cmd_hca_cap, hcattr, log_max_srq);
attr->log_max_srq_sz = MLX5_GET(cmd_hca_cap, hcattr, log_max_srq_sz);
+ attr->reg_c_preserve =
+ MLX5_GET(cmd_hca_cap, hcattr, reg_c_preserve);
if (attr->qos.sup) {
MLX5_SET(query_hca_cap_in, in, op_mod,
MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP |
@@ -114,6 +114,7 @@ struct mlx5_hca_attr {
uint32_t scatter_fcs_w_decap_disable:1;
uint32_t flow_hit_aso:1; /* General obj type FLOW_HIT_ASO supported. */
uint32_t regex:1;
+ uint32_t reg_c_preserve:1;
uint32_t regexp_num_of_engines;
uint32_t log_max_ft_sampler_num:8;
struct mlx5_hca_qos_attr qos;
@@ -1130,7 +1130,9 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 regexp[0x1];
u8 reserved_at_a1[0x3];
u8 regexp_num_of_engines[0x4];
- u8 reserved_at_a8[0x3];
+ u8 reserved_at_a8[0x1];
+ u8 reg_c_preserve[0x1];
+ u8 reserved_at_aa[0x1];
u8 log_max_srq[0x5];
u8 reserved_at_b0[0x3];
u8 regexp_log_crspace_size[0x5];