[10/36] net/sfc: add EF100 support
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Commit Message
Riverhead is the first NIC of the EF100 architecture.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
---
drivers/common/sfc_efx/efsys.h | 4 ++--
drivers/net/sfc/sfc_dp.h | 1 +
drivers/net/sfc/sfc_ethdev.c | 4 ++++
3 files changed, 7 insertions(+), 2 deletions(-)
Comments
On 10/13/2020 2:45 PM, Andrew Rybchenko wrote:
> Riverhead is the first NIC of the EF100 architecture.
>
> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Should documentation and web page [1] updated for new device support?
Riverhead is name of the NIC, and EF100 is the name of the IP in that NIC,
right? Is the Riverhead NIC public now?
[1] https://core.dpdk.org/supported/nics/solarflare/
On 10/14/20 1:40 PM, Ferruh Yigit wrote:
> On 10/13/2020 2:45 PM, Andrew Rybchenko wrote:
>> Riverhead is the first NIC of the EF100 architecture.
>>
>> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
>
> Should documentation and web page [1] updated for new device support?
Yes, I will send web page update patch a bit later. Thanks.
> Riverhead is name of the NIC, and EF100 is the name of the IP in that
> NIC, right? Is the Riverhead NIC public now?
EF100 is a an architecture name (the previous one is EF10).
Riverhead is an engineering name (similar to Huntington,
Medford and Medford2 in base driver). See NIC name in doc
patch.
> [1] https://core.dpdk.org/supported/nics/solarflare/
@@ -104,8 +104,8 @@ prefetch_read_once(const volatile void *addr)
#define EFSYS_OPT_MEDFORD 1
/* Enable SFN2xxx support */
#define EFSYS_OPT_MEDFORD2 1
-/* Disable Riverhead support */
-#define EFSYS_OPT_RIVERHEAD 0
+/* Enable Riverhead support */
+#define EFSYS_OPT_RIVERHEAD 1
#ifdef RTE_LIBRTE_SFC_EFX_DEBUG
#define EFSYS_OPT_CHECK_REG 1
@@ -83,6 +83,7 @@ struct sfc_dp {
#define SFC_DP_HW_FW_CAP_RX_ES_SUPER_BUFFER 0x2
#define SFC_DP_HW_FW_CAP_RX_EFX 0x4
#define SFC_DP_HW_FW_CAP_TX_EFX 0x8
+#define SFC_DP_HW_FW_CAP_EF100 0x10
};
/** List of datapath variants */
@@ -1927,6 +1927,9 @@ sfc_eth_dev_set_ops(struct rte_eth_dev *dev)
avail_caps |= SFC_DP_HW_FW_CAP_RX_EFX;
avail_caps |= SFC_DP_HW_FW_CAP_TX_EFX;
break;
+ case EFX_FAMILY_RIVERHEAD:
+ avail_caps |= SFC_DP_HW_FW_CAP_EF100;
+ break;
default:
break;
}
@@ -2302,6 +2305,7 @@ static const struct rte_pci_id pci_id_sfc_efx_map[] = {
{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD_VF) },
{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2) },
{ RTE_PCI_DEVICE(EFX_PCI_VENID_SFC, EFX_PCI_DEVID_MEDFORD2_VF) },
+ { RTE_PCI_DEVICE(EFX_PCI_VENID_XILINX, EFX_PCI_DEVID_RIVERHEAD) },
{ .vendor_id = 0 /* sentinel */ }
};