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[4/4] doc: update hairpin support for mlx5 driver

Message ID 1602166620-46303-5-git-send-email-bingz@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers show
Series add two ports hairpin mode support in mlx5 PMD | expand


Context Check Description
ci/Intel-compilation success Compilation OK
ci/travis-robot warning Travis build: failed
ci/checkpatch success coding style OK

Commit Message

Bing Zhao Oct. 8, 2020, 2:17 p.m. UTC
Hairpin between two ports will be supported by mlx5 PMD.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
 doc/guides/rel_notes/release_20_11.rst | 5 +++++
 1 file changed, 5 insertions(+)
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diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst
index 05ceea0..454472b 100644
--- a/doc/guides/rel_notes/release_20_11.rst
+++ b/doc/guides/rel_notes/release_20_11.rst
@@ -70,6 +70,11 @@  New Features
   * Added support for non-zero priorities for group 0 flows
   * Added support for VXLAN decap combined with VLAN pop
+* **Updated Nvidia mlx5 driver.**
+  * Added support for hairpin between two ports and hairpin explicit
+    TX flow rules insertion.
 * **Updated Solarflare network PMD.**
   Updated the Solarflare ``sfc_efx`` driver with changes including: