From patchwork Thu Jul 30 19:49:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Timothy McDaniel X-Patchwork-Id: 75054 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 022DEA052B; Thu, 30 Jul 2020 21:53:29 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6FB501C038; Thu, 30 Jul 2020 21:53:09 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 5792C1C030 for ; Thu, 30 Jul 2020 21:53:08 +0200 (CEST) IronPort-SDR: 1cgkh2n2UwzmopUp1dVrteX+mqF4Gu3iNZVtfsTwoAivZVlWLK+13xTUIbw8zx8QGx0yOtCB3o WmeGTmbkb/cQ== X-IronPort-AV: E=McAfee;i="6000,8403,9698"; a="139672289" X-IronPort-AV: E=Sophos;i="5.75,415,1589266800"; d="scan'208";a="139672289" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jul 2020 12:53:06 -0700 IronPort-SDR: wd2IgwKmYEUMBETaWV26Lw0fR2G5/TTBAC6lCmeMpg/ixTyaCrO7YdVIWmDEM7fqpf7uF4EnXV hdl6MtdL/eMA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,415,1589266800"; d="scan'208";a="465378078" Received: from txasoft-yocto.an.intel.com ([10.123.72.192]) by orsmga005.jf.intel.com with ESMTP; 30 Jul 2020 12:53:05 -0700 From: "McDaniel, Timothy" To: jerinj@marvell.com Cc: mattias.ronnblom@ericsson.com, dev@dpdk.org, gage.eads@intel.com, harry.van.haaren@intel.com, "McDaniel, Timothy" Date: Thu, 30 Jul 2020 14:49:51 -0500 Message-Id: <1596138614-17409-5-git-send-email-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1596138614-17409-1-git-send-email-timothy.mcdaniel@intel.com> References: <1593232671-5690-0-git-send-email-timothy.mcdaniel@intel.com> <1596138614-17409-1-git-send-email-timothy.mcdaniel@intel.com> Subject: [dpdk-dev] [PATCH 04/27] event/dlb: add make and meson build infrastructure X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: "McDaniel, Timothy" Signed-off-by: McDaniel, Timothy --- config/common_base | 19 ++++++++++++++++++- config/rte_config.h | 8 +++++++- drivers/event/Makefile | 7 +++++++ drivers/event/dlb/Makefile | 27 +++++++++++++++++++++++++++ drivers/event/dlb/meson.build | 7 +++++++ drivers/event/meson.build | 4 ++++ mk/rte.app.mk | 1 + 7 files changed, 71 insertions(+), 2 deletions(-) create mode 100644 drivers/event/dlb/Makefile create mode 100644 drivers/event/dlb/meson.build diff --git a/config/common_base b/config/common_base index f76585f..248a911 100644 --- a/config/common_base +++ b/config/common_base @@ -754,7 +754,7 @@ CONFIG_RTE_MAX_REGEXDEV_DEVS=32 CONFIG_RTE_LIBRTE_EVENTDEV=y CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n CONFIG_RTE_EVENT_MAX_DEVS=16 -CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64 +CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=255 CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32 CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024 CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32 @@ -802,6 +802,23 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=n CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n # +# Compile PMD for dlb event device +# +CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV=y +# Specify an upper bound on cycles between each CQ access when hard polling +CONFIG_RTE_LIBRTE_PMD_DLB_POLL_INTERVAL=1000 +# Specify control state to use when executing UMWAIT instruction. +# If 0, then use CO.2, which has a slower wakeup time, but greater +# power savings. +# If 1, then use C0.1, which has a faster wakeup time, but smaller +# power savings. +CONFIG_RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE=0 +# Suppress statistics calculation +CONFIG_RTE_LIBRTE_PMD_DLB_QUELL_STATS=n +# Specify software credit quanta +CONFIG_RTE_LIBRTE_PMD_DLB_SW_CREDIT_QUANTA=32 + +# # Compile raw device support # EXPERIMENTAL: API may change without prior notice # diff --git a/config/rte_config.h b/config/rte_config.h index 9bb9153..29bee26 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -74,7 +74,7 @@ /* eventdev defines */ #define RTE_EVENT_MAX_DEVS 16 -#define RTE_EVENT_MAX_QUEUES_PER_DEV 64 +#define RTE_EVENT_MAX_QUEUES_PER_DEV 255 #define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32 #define RTE_EVENT_ETH_INTR_RING_SIZE 1024 #define RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE 32 @@ -135,4 +135,10 @@ /* QEDE PMD defines */ #define RTE_LIBRTE_QEDE_FW "" +/* DLB PMD defines */ +#define RTE_LIBRTE_PMD_DLB_POLL_INTERVAL 1000 +#define RTE_LIBRTE_PMD_DLB_UMWAIT_CTL_STATE 0 +#undef RTE_LIBRTE_PMD_DLB_QUELL_STATS +#define RTE_LIBRTE_PMD_DLB_SW_CREDIT_QUANTA 32 + #endif /* _RTE_CONFIG_H_ */ diff --git a/drivers/event/Makefile b/drivers/event/Makefile index 86be41b..3bde8f0 100644 --- a/drivers/event/Makefile +++ b/drivers/event/Makefile @@ -16,5 +16,12 @@ ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy) DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2 endif DIRS-$(CONFIG_RTE_LIBRTE_PMD_OPDL_EVENTDEV) += opdl +# DLB limited to linux x86 architectures +ifneq ($(filter y,$(CONFIG_RTE_ARCH_X86_64) \ + $(CONFIG_RTE_ARCH_X86)),) +ifeq ($(CONFIG_RTE_EXEC_ENV_LINUX),y) +DIRS-$(CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV) += dlb +endif +endif include $(RTE_SDK)/mk/rte.subdir.mk diff --git a/drivers/event/dlb/Makefile b/drivers/event/dlb/Makefile new file mode 100644 index 0000000..f191762 --- /dev/null +++ b/drivers/event/dlb/Makefile @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2016-2020 Intel Corporation. + +include $(RTE_SDK)/mk/rte.vars.mk + +# library name +LIB = librte_pmd_dlb_eventdev.a + +# build flags +CFLAGS += -O3 -pthread +CFLAGS += $(WERROR_FLAGS) +# rte_mp_ APIs are still marked experimental +LDLIBS += -lrte_eal -lrte_eventdev -lrte_mbuf -lrte_kvargs -lrte_ring +LDLIBS += -lrte_mempool -lpthread -lrte_pci -lrte_bus_pci + +# library version +LIBABIVER := 1 + +# versioning export map +EXPORT_MAP := rte_pmd_dlb_event_version.map + +# library source files +SRCS-$(CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV) += pf/base/dlb_resource.c + +# export include files + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/event/dlb/meson.build b/drivers/event/dlb/meson.build new file mode 100644 index 0000000..4fae0eb --- /dev/null +++ b/drivers/event/dlb/meson.build @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2019-2020 Intel Corporation + +sources = files('pf/base/dlb_resource.c' +) + +deps += ['mbuf', 'mempool', 'ring', 'pci', 'bus_pci'] diff --git a/drivers/event/meson.build b/drivers/event/meson.build index ebe76a7..35060c6 100644 --- a/drivers/event/meson.build +++ b/drivers/event/meson.build @@ -10,6 +10,10 @@ if not (toolchain == 'gcc' and cc.version().version_compare('<4.8.6') and dpdk_conf.has('RTE_ARCH_ARM64')) drivers += 'octeontx' endif +if ((dpdk_conf.has('RTE_ARCH_X86_64') or dpdk_conf.has('RTE_ARCH_X86')) and + is_linux) + drivers += 'dlb' +endif std_deps = ['eventdev', 'kvargs'] config_flag_fmt = 'RTE_LIBRTE_@0@_EVENTDEV_PMD' driver_name_fmt = 'rte_pmd_@0@_event' diff --git a/mk/rte.app.mk b/mk/rte.app.mk index a544259..3dd8ae2 100644 --- a/mk/rte.app.mk +++ b/mk/rte.app.mk @@ -327,6 +327,7 @@ endif # CONFIG_RTE_LIBRTE_COMPRESSDEV ifeq ($(CONFIG_RTE_LIBRTE_EVENTDEV),y) _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV) += -lrte_pmd_skeleton_event _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV) += -lrte_pmd_sw_event +_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DLB_EVENTDEV) += -lrte_pmd_dlb_eventdev _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV) += -lrte_pmd_dsw_event _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += -lrte_pmd_octeontx_ssovf ifeq ($(CONFIG_RTE_LIBRTE_DPAA_BUS),y)