[v9,0/3] generic rte atomic APIs deprecate proposal

Message ID 1594962519-20619-1-git-send-email-phil.yang@arm.com (mailing list archive)


Phil Yang July 17, 2020, 5:08 a.m. UTC
  DPDK provides generic rte_atomic APIs to do several atomic operations.
These APIs are using the deprecated __sync builtins and enforce full
memory barriers on aarch64. However, full barriers are not necessary
in many use cases. In order to address such use cases, C language offers
C11 atomic APIs. The C11 atomic APIs provide finer memory barrier control
by making use of the memory ordering parameter provided by the user.
Various patches submitted in the past [2] and the patches in this series
indicate significant performance gains on multiple aarch64 CPUs and no
performance loss on x86.

But the existing rte_atomic API implementations cannot be changed as the
APIs do not take the memory ordering parameter. The only choice available
is replacing the usage of the rte_atomic APIs with C11 atomic APIs. In
order to make this change, the following steps are proposed:

[1] deprecate rte_atomic APIs so that future patches do not use rte_atomic
APIs (a script is added to flag the usages).
[2] refactor the code that uses rte_atomic APIs to use c11 atomic APIs.

This patchset contains:
1) changes to programmer guide describing writing efficient code for aarch64.
2) the checkpatch script changes to flag rte_atomicNN_xxx and rte_smp_[r/w]mb
APIs usage in patches.
3) wraps up __atomic_thread_fence with explicit memory ordering parameter.

1. Change built-ins to builtins. (David)
2. Flag all the new code which use rte_atomicNN_xx and rte_smp_[r/w]mb.
3. Simplify the warning output of the checkpatch script. (David)

Make descriptions more general. (Honnappa)

1. Remove code blocks in the guidance.
2. Remove code reference links in the guidance.
3. Remove the update of C11 atomics maintainers.

Add check for rte_smp barriers APIs in the new code.

1. Wraps up __atomic_thread_fence to support optimized code for
__ATOMIC_SEQ_CST memory order.
2. Flag __atomic_thread_fence with __ATOMIC_SEQ_CST in new patches.
3. Fix email address typo in patch 2/4.

1. add reader-writer concurrency case describing.
2. claim maintainership of c11 atomics code for each platforms.
3. flag rte_atomicNN_xxx in new patches for modules that have been converted to
c11 style.
4. flag __sync_xxx builtins in new patches.
5. wraps up compiler atomic builtins
6. move the changes of libraries which make use of c11 atomic APIs out of this

add libatomic dependency for 32-bit clang

1. fix Clang '-Wincompatible-pointer-types' WARNING.
2. fix typos.

Phil Yang (3):
  doc: add optimizations using C11 atomic builtins
  devtools: prevent use of rte atomic APIs in future patches
  eal/atomic: add wrapper for C11 atomic thread fence

 devtools/checkpatches.sh                         | 35 ++++++++++++++
 doc/guides/prog_guide/writing_efficient_code.rst | 59 +++++++++++++++++++++++-
 lib/librte_eal/arm/include/rte_atomic_32.h       |  6 +++
 lib/librte_eal/arm/include/rte_atomic_64.h       |  6 +++
 lib/librte_eal/include/generic/rte_atomic.h      |  6 +++
 lib/librte_eal/ppc/include/rte_atomic.h          |  6 +++
 lib/librte_eal/x86/include/rte_atomic.h          | 17 +++++++
 7 files changed, 134 insertions(+), 1 deletion(-)