diff mbox series

[v1,01/13] bbdev: add capability flag for filler bits inclusion in HARQ

Message ID 1585513100-67277-2-git-send-email-nicolas.chautru@intel.com (mailing list archive)
State Superseded, archived
Headers
Series drivers/baseband: PMD for FPGA 5GNR FEC |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-testing success Testing PASS
ci/Intel-compilation success Compilation OK

Commit Message

Chautru, Nicolas March 29, 2020, 8:18 p.m. UTC 
  From: Nic Chautru <nicolas.chautru@intel.com>

Adding capability flag for device variants when HARQ buffer
may or may not include the filler bits.
Minor cosmetic changes in same file.

Signed-off-by: Nic Chautru <nicolas.chautru@intel.com>
---
 lib/librte_bbdev/rte_bbdev.h    |  2 ++
 lib/librte_bbdev/rte_bbdev_op.h | 12 ++++++++++--
 2 files changed, 12 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/lib/librte_bbdev/rte_bbdev.h b/lib/librte_bbdev/rte_bbdev.h
index 591fb79..b2da190 100644
--- a/lib/librte_bbdev/rte_bbdev.h
+++ b/lib/librte_bbdev/rte_bbdev.h
@@ -607,6 +607,7 @@  struct __rte_cache_aligned rte_bbdev {
  * @param ops
  *   Pointer array where operations will be dequeued to. Must have at least
  *   @p num_ops entries
+ *   ie. A pointer to a table of void * pointers (ops) that will be filled.
  * @param num_ops
  *   The maximum number of operations to dequeue.
  *
@@ -638,6 +639,7 @@  struct __rte_cache_aligned rte_bbdev {
  * @param ops
  *   Pointer array where operations will be dequeued to. Must have at least
  *   @p num_ops entries
+ *   ie. A pointer to a table of void * pointers (ops) that will be filled.
  * @param num_ops
  *   The maximum number of operations to dequeue.
  *
diff --git a/lib/librte_bbdev/rte_bbdev_op.h b/lib/librte_bbdev/rte_bbdev_op.h
index 1e119a7..c8a354e 100644
--- a/lib/librte_bbdev/rte_bbdev_op.h
+++ b/lib/librte_bbdev/rte_bbdev_op.h
@@ -31,8 +31,11 @@ 
 #define RTE_BBDEV_TURBO_MAX_TB_SIZE (391656)
 /* Maximum size of Code Block (36.212, Table 5.1.3-3) */
 #define RTE_BBDEV_TURBO_MAX_CB_SIZE (6144)
-/* Maximum size of Code Block  */
+/* Maximum size of Code Block */
 #define RTE_BBDEV_LDPC_MAX_CB_SIZE (8448)
+/* Minimum size of Code Block */
+#define RTE_BBDEV_LDPC_MIN_CB_SIZE (40)
+
 /* Minimum size of Code Block (36.212, Table 5.1.3-3) */
 #define RTE_BBDEV_TURBO_MIN_CB_SIZE (40)
 /* Maximum size of circular buffer */
@@ -177,7 +180,12 @@  enum rte_bbdev_op_ldpcdec_flag_bitmasks {
 	/** Set if a device supports loop-back access to
 	 *  HARQ internal memory. Intended for troubleshooting.
 	 */
-	RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK = (1ULL << 17)
+	RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK = (1ULL << 17),
+	/** Set if a device includes LLR filler bits in the circular buffer
+	 *  for HARQ memory. If not set, it is assumed the filler bits are not
+	 *  in HARQ memory and handled directly by the LDPC decoder.
+	 */
+	RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18)
 };
 
 /** Flags for LDPC encoder operation and capability structure */