diff mbox series

[09/12] net/mlx5: update source and destination vport translations

Message ID 1569398015-6027-10-git-send-email-viacheslavo@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers show
Series net/mlx5: add bonding configuration support | expand

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Slava Ovsiienko Sept. 25, 2019, 7:53 a.m. UTC
There new kernel/rdma_core [1] supports matching on metadata
register instead of vport field to provide operations over
VF LAG bonding configurations. This patch provides correct
translations for flow matchers and destination port actions
if united E-Switch (for VF LAG) is configured and/or new vport
matching mode is engaged.

[1] http://patchwork.ozlabs.org/cover/1122170/
    "Mellanox, mlx5 vport metadata matching"

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 38 +++++++++++++++++++++++++++++++++++---
 drivers/net/mlx5/mlx5_prm.h     |  9 ++++++++-
 2 files changed, 43 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index ad4ff5a..2a7e3ed 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -4617,6 +4617,29 @@  struct field_modify_info modify_tcp[] = {
 }
 
 /**
+ * Add vport metadata Reg C0 item to matcher
+ *
+ * @param[in, out] matcher
+ *   Flow matcher.
+ * @param[in, out] key
+ *   Flow matcher value.
+ * @param[in] reg
+ *   Flow pattern to translate.
+ */
+static void
+flow_dv_translate_item_meta_vport(void *matcher, void *key,
+				  uint32_t value, uint32_t mask)
+{
+	void *misc2_m =
+		MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
+	void *misc2_v =
+		MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
+
+	MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
+	MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, value);
+}
+
+/**
  * Add source vport match to the specified matcher.
  *
  * @param[in, out] matcher
@@ -4668,8 +4691,14 @@  struct field_modify_info modify_tcp[] = {
 	priv = mlx5_port_to_eswitch_info(id);
 	if (!priv)
 		return -rte_errno;
-	flow_dv_translate_item_source_vport(matcher, key,
-					    priv->vport_id, mask);
+	/* Translate to vport field or to metadata, depending on mode. */
+	if (priv->vport_meta_mask)
+		flow_dv_translate_item_meta_vport(matcher, key,
+						  priv->vport_meta_tag,
+						  priv->vport_meta_mask);
+	else
+		flow_dv_translate_item_source_vport(matcher, key,
+						    priv->vport_id, mask);
 	return 0;
 }
 
@@ -5113,7 +5142,10 @@  struct field_modify_info modify_tcp[] = {
 					  RTE_FLOW_ERROR_TYPE_ACTION,
 					  NULL,
 					  "No eswitch info was found for port");
-	*dst_port_id = priv->vport_id;
+	if (priv->vport_meta_mask)
+		*dst_port_id = priv->ibv_port;
+	else
+		*dst_port_id = priv->vport_id;
 	return 0;
 }
 
diff --git a/drivers/net/mlx5/mlx5_prm.h b/drivers/net/mlx5/mlx5_prm.h
index e5afc1c..3765df0 100644
--- a/drivers/net/mlx5/mlx5_prm.h
+++ b/drivers/net/mlx5/mlx5_prm.h
@@ -614,7 +614,14 @@  struct mlx5_ifc_fte_match_set_misc2_bits {
 	struct mlx5_ifc_fte_match_mpls_bits inner_first_mpls;
 	struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_gre;
 	struct mlx5_ifc_fte_match_mpls_bits outer_first_mpls_over_udp;
-	u8 reserved_at_80[0x100];
+	u8 metadata_reg_c_7[0x20];
+	u8 metadata_reg_c_6[0x20];
+	u8 metadata_reg_c_5[0x20];
+	u8 metadata_reg_c_4[0x20];
+	u8 metadata_reg_c_3[0x20];
+	u8 metadata_reg_c_2[0x20];
+	u8 metadata_reg_c_1[0x20];
+	u8 metadata_reg_c_0[0x20];
 	u8 metadata_reg_a[0x20];
 	u8 reserved_at_1a0[0x60];
 };