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DIR:OUT; SFP:1101; SCL:1; SRVR:SN6PR07MB5661; H:SN6PR07MB4911.namprd07.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: cavium.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: beLzgbRfG4rC5HI/mWHCN/+yYDA2UtV2EnZekzS1Jd8LPS/1+gX8Kf3oDsKWJrSOyVm0csdIwNjQJH4f0RqcbIVTNEgM5NGtiJNM7E/KiLOmJuS/Du7UZmuFbMKBwRhXW2inKMk6f8AnuCO0sSCYpWSPq4vTiwW+m7HjUxoLZtSF1m8NPlo4Njftit2K7A9WZpc0OzNQXQXgWuXR1YCjdPC5UZeLHrl59/nsmiPZariHwb8u31ZRidFirvifjU3R5YP6CoJmz34QquZ5dkR4I67GhbDOB/katiC9HfMaxm7ovJRT6/zQdsgQCQA5ZjQzTEjMZBLrGHo0OfiBWm7hjA/tOWpjXNCw0b7JkqDHBZ4= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-ID: MIME-Version: 1.0 X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-Network-Message-Id: 776b5c7a-3e3a-45a2-96cf-08d64a1587a7 X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Nov 2018 09:42:45.5073 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR07MB5661 Subject: [dpdk-dev] [PATCH] doc/guides: update build steps for OCTEON TX X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Updating platform doc with steps to build when using Cavium OCTEON TX SDK. SDK would be required for using crypto offload block. Signed-off-by: Anoob Joseph --- doc/guides/cryptodevs/octeontx.rst | 29 ++++------ doc/guides/platform/octeontx.rst | 116 +++++++++++++++++++++++++++++++++++-- 2 files changed, 123 insertions(+), 22 deletions(-) diff --git a/doc/guides/cryptodevs/octeontx.rst b/doc/guides/cryptodevs/octeontx.rst index 660e980..1600a56 100644 --- a/doc/guides/cryptodevs/octeontx.rst +++ b/doc/guides/cryptodevs/octeontx.rst @@ -53,11 +53,8 @@ AEAD Algorithms * ``RTE_CRYPTO_AEAD_AES_GCM`` -Compilation ------------ - -The **OCTEON TX** :sup:`®` board must be running the linux kernel based on -sdk-6.2.0 patch 3. In this, the OCTEON TX crypto PF driver is already built in. +Config flags +------------ For compiling the OCTEON TX crypto poll mode driver, please check if the CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO setting is set to `y` in @@ -65,23 +62,21 @@ config/common_base file. * ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y`` -The following are the steps to compile the OCTEON TX crypto poll mode driver: +Compilation +----------- -.. code-block:: console +The OCTEON TX crypto poll mode driver can be compiled either natively on +**OCTEON TX** :sup:`®` board or cross-compiled on an x86 based platform. - cd - make config T=arm64-thunderx-linuxapp-gcc - make +Refer :doc:`../platform/octeontx` for details about setting up the platform +and building DPDK applications. -The example applications can be compiled using the following: +.. note:: -.. code-block:: console + OCTEON TX crypto PF driver needs microcode to be available at `/lib/firmware/` directory. + Refer SDK documents for further information. - cd - export RTE_SDK=$PWD - export RTE_TARGET=build - cd examples/ - make +SDK and related information can be obtained from: `Cavium support site `_. Execution --------- diff --git a/doc/guides/platform/octeontx.rst b/doc/guides/platform/octeontx.rst index 9f75d2a..3bde91f 100644 --- a/doc/guides/platform/octeontx.rst +++ b/doc/guides/platform/octeontx.rst @@ -15,11 +15,15 @@ More information about SoC can be found at `Cavium, Inc Official Website Common Offload HW Block Drivers ------------------------------- -1. **Eventdev Driver** +1. **Crypto Driver** + See :doc:`../cryptodevs/octeontx` for octeontx crypto driver + information. + +2. **Eventdev Driver** See :doc:`../eventdevs/octeontx` for octeontx ssovf eventdev driver information. -2. **Mempool Driver** +3. **Mempool Driver** See :doc:`../mempool/octeontx` for octeontx fpavf mempool driver information. @@ -35,6 +39,12 @@ OCTEON TX compatible board: Platform drivers) are available on Github at `octeontx-kmod `_ along with build, install and dpdk usage instructions. +.. note:: + + The PF driver and the required microcode for the crypto offload block will be + available with OCTEON TX SDK only. So for using crypto offload, follow the steps + mentioned in :ref:`setup_platform_using_OCTEON_TX_SDK`. + 2. **ARM64 Tool Chain** For example, the *aarch64* Linaro Toolchain, which can be obtained from @@ -48,8 +58,104 @@ OCTEON TX compatible board: As an alternative method, Platform drivers can also be executed using images provided as part of SDK from Cavium. The SDK includes all the above prerequisites necessary - to bring up a OCTEON TX board. - - SDK and related information can be obtained from: `Cavium support site `_. + to bring up a OCTEON TX board. Please refer :ref:`setup_platform_using_OCTEON_TX_SDK`. - Follow the DPDK :doc:`../linux_gsg/index` to setup the basic DPDK environment. + +.. _setup_platform_using_OCTEON_TX_SDK: + +Setup Platform Using OCTEON TX SDK +---------------------------------- + +The OCTEON TX platform drivers can be compiled either natively on +**OCTEON TX** :sup:`®` board or cross-compiled on an x86 based platform. + +The **OCTEON TX** :sup:`®` board must be running the linux kernel based on +OCTEON TX SDK 6.2.0 patch 3. In this, the PF drivers for all hardware +offload blocks are already built in. + +Native Compilation +~~~~~~~~~~~~~~~~~~ + +If the kernel and modules are cross-compiled and copied to the target board, +some intermediate binaries required for native build would be missing on the +target board. To make sure all the required binaries are available in the +native architecture, the linux sources need to be compiled once natively. + +.. code-block:: console + + cd /lib/modules/$(uname -r)/source + make menuconfig + make + +The above steps would rebuild the modules and the required intermediate binaries. +Once the target is ready for native compilation, the OCTEON TX platform +drivers can be compiled with the following steps, + +.. code-block:: console + + cd + make config T=arm64-thunderx-linuxapp-gcc + make + +The example applications can be compiled using the following: + +.. code-block:: console + + cd + export RTE_SDK=$PWD + export RTE_TARGET=build + cd examples/ + make + +Cross Compilation +~~~~~~~~~~~~~~~~~ + +The DPDK applications can be cross-compiled on any x86 based platform. The +OCTEON TX SDK need to be installed on the build system. The SDK package will +provide the required toolchain etc. + +Refer to :doc:`../linux_gsg/cross_build_dpdk_for_arm64` for further steps on +compilation. The 'host' & 'CC' to be used in the commands would change, +in addition to the paths to which libnuma related files have to be +copied. + +The following steps can be used to perform cross-compilation with OCTEON TX +SDK 6.2.0 patch 3: + +.. code-block:: console + + cd + source env-setup + + git clone https://github.com/numactl/numactl.git + cd numactl + git checkout v2.0.11 -b v2.0.11 + ./autogen.sh + autoconf -i + ./configure --host=aarch64-thunderx-linux CC=aarch64-thunderx-linux-gnu-gcc --prefix= + make install + +The above steps will prepare build system with numa additions. Now this build system can be used +to build applications for **OCTEON TX** :sup:`®` platforms. + +.. code-block:: console + + cd + export RTE_SDK=$PWD + export RTE_KERNELDIR=$THUNDER_ROOT/linux/kernel/linux + make config T=arm64-thunderx-linuxapp-gcc + make -j CROSS=aarch64-thunderx-linux-gnu- CONFIG_RTE_KNI_KMOD=n CONFIG_RTE_EAL_IGB_UIO=n EXTRA_CFLAGS="-isystem /include" EXTRA_LDFLAGS="-L/lib -lnuma" + +If NUMA support is not required, it can be disabled as explained in +:doc:`../linux_gsg/cross_build_dpdk_for_arm64`. + +Following steps could be used in that case. + +.. code-block:: console + + make config T=arm64-thunderx-linuxapp-gcc + make CROSS=aarch64-thunderx-linux-gnu- + + +SDK and related information can be obtained from: `Cavium support site `_.