diff mbox series

doc/guides: update build steps for OCTEON TX

Message ID 1542188533-30962-1-git-send-email-anoob.joseph@caviumnetworks.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers show
Series doc/guides: update build steps for OCTEON TX | expand

Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/mellanox-Performance-Testing success Performance Testing PASS
ci/intel-Performance-Testing success Performance Testing PASS

Commit Message

Anoob Joseph Nov. 14, 2018, 9:42 a.m. UTC
Updating platform doc with steps to build when using Cavium OCTEON TX
SDK. SDK would be required for using crypto offload block.

Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
---
 doc/guides/cryptodevs/octeontx.rst |  29 ++++------
 doc/guides/platform/octeontx.rst   | 116 +++++++++++++++++++++++++++++++++++--
 2 files changed, 123 insertions(+), 22 deletions(-)

Comments

Thomas Monjalon Nov. 19, 2018, 12:12 a.m. UTC | #1
14/11/2018 10:42, Anoob Joseph:
> Updating platform doc with steps to build when using Cavium OCTEON TX
> SDK. SDK would be required for using crypto offload block.
> 
> Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>

Applied, thanks
diff mbox series

Patch

diff --git a/doc/guides/cryptodevs/octeontx.rst b/doc/guides/cryptodevs/octeontx.rst
index 660e980..1600a56 100644
--- a/doc/guides/cryptodevs/octeontx.rst
+++ b/doc/guides/cryptodevs/octeontx.rst
@@ -53,11 +53,8 @@  AEAD Algorithms
 
 * ``RTE_CRYPTO_AEAD_AES_GCM``
 
-Compilation
------------
-
-The **OCTEON TX** :sup:`®` board must be running the linux kernel based on
-sdk-6.2.0 patch 3. In this, the OCTEON TX crypto PF driver is already built in.
+Config flags
+------------
 
 For compiling the OCTEON TX crypto poll mode driver, please check if the
 CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO setting is set to `y` in
@@ -65,23 +62,21 @@  config/common_base file.
 
 * ``CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y``
 
-The following are the steps to compile the OCTEON TX crypto poll mode driver:
+Compilation
+-----------
 
-.. code-block:: console
+The OCTEON TX crypto poll mode driver can be compiled either natively on
+**OCTEON TX** :sup:`®` board or cross-compiled on an x86 based platform.
 
-        cd <dpdk directory>
-        make config T=arm64-thunderx-linuxapp-gcc
-        make
+Refer :doc:`../platform/octeontx` for details about setting up the platform
+and building DPDK applications.
 
-The example applications can be compiled using the following:
+.. note::
 
-.. code-block:: console
+   OCTEON TX crypto PF driver needs microcode to be available at `/lib/firmware/` directory.
+   Refer SDK documents for further information.
 
-        cd <dpdk directory>
-        export RTE_SDK=$PWD
-        export RTE_TARGET=build
-        cd examples/<application>
-        make
+SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
 
 Execution
 ---------
diff --git a/doc/guides/platform/octeontx.rst b/doc/guides/platform/octeontx.rst
index 9f75d2a..3bde91f 100644
--- a/doc/guides/platform/octeontx.rst
+++ b/doc/guides/platform/octeontx.rst
@@ -15,11 +15,15 @@  More information about SoC can be found at `Cavium, Inc Official Website
 Common Offload HW Block Drivers
 -------------------------------
 
-1. **Eventdev Driver**
+1. **Crypto Driver**
+   See :doc:`../cryptodevs/octeontx` for octeontx crypto driver
+   information.
+
+2. **Eventdev Driver**
    See :doc:`../eventdevs/octeontx` for octeontx ssovf eventdev driver
    information.
 
-2. **Mempool Driver**
+3. **Mempool Driver**
    See :doc:`../mempool/octeontx` for octeontx fpavf mempool driver
    information.
 
@@ -35,6 +39,12 @@  OCTEON TX compatible board:
    Platform drivers) are available on Github at `octeontx-kmod <https://github.com/caviumnetworks/octeontx-kmod>`_
    along with build, install and dpdk usage instructions.
 
+.. note::
+
+   The PF driver and the required microcode for the crypto offload block will be
+   available with OCTEON TX SDK only. So for using crypto offload, follow the steps
+   mentioned in :ref:`setup_platform_using_OCTEON_TX_SDK`.
+
 2. **ARM64 Tool Chain**
 
    For example, the *aarch64* Linaro Toolchain, which can be obtained from
@@ -48,8 +58,104 @@  OCTEON TX compatible board:
 
    As an alternative method, Platform drivers can also be executed using images provided
    as part of SDK from Cavium. The SDK includes all the above prerequisites necessary
-   to bring up a OCTEON TX board.
-
-   SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.
+   to bring up a OCTEON TX board. Please refer :ref:`setup_platform_using_OCTEON_TX_SDK`.
 
 - Follow the DPDK :doc:`../linux_gsg/index` to setup the basic DPDK environment.
+
+.. _setup_platform_using_OCTEON_TX_SDK:
+
+Setup Platform Using OCTEON TX SDK
+----------------------------------
+
+The OCTEON TX platform drivers can be compiled either natively on
+**OCTEON TX** :sup:`®` board or cross-compiled on an x86 based platform.
+
+The **OCTEON TX** :sup:`®` board must be running the linux kernel based on
+OCTEON TX SDK 6.2.0 patch 3. In this, the PF drivers for all hardware
+offload blocks are already built in.
+
+Native Compilation
+~~~~~~~~~~~~~~~~~~
+
+If the kernel and modules are cross-compiled and copied to the target board,
+some intermediate binaries required for native build would be missing on the
+target board. To make sure all the required binaries are available in the
+native architecture, the linux sources need to be compiled once natively.
+
+.. code-block:: console
+
+        cd /lib/modules/$(uname -r)/source
+        make menuconfig
+        make
+
+The above steps would rebuild the modules and the required intermediate binaries.
+Once the target is ready for native compilation, the OCTEON TX platform
+drivers can be compiled with the following steps,
+
+.. code-block:: console
+
+        cd <dpdk directory>
+        make config T=arm64-thunderx-linuxapp-gcc
+        make
+
+The example applications can be compiled using the following:
+
+.. code-block:: console
+
+        cd <dpdk directory>
+        export RTE_SDK=$PWD
+        export RTE_TARGET=build
+        cd examples/<application>
+        make
+
+Cross Compilation
+~~~~~~~~~~~~~~~~~
+
+The DPDK applications can be cross-compiled on any x86 based platform. The
+OCTEON TX SDK need to be installed on the build system. The SDK package will
+provide the required toolchain etc.
+
+Refer to :doc:`../linux_gsg/cross_build_dpdk_for_arm64` for further steps on
+compilation. The 'host' & 'CC' to be used in the commands would change,
+in addition to the paths to which libnuma related files have to be
+copied.
+
+The following steps can be used to perform cross-compilation with OCTEON TX
+SDK 6.2.0 patch 3:
+
+.. code-block:: console
+
+        cd <sdk_install_dir>
+        source env-setup
+
+        git clone https://github.com/numactl/numactl.git
+        cd numactl
+        git checkout v2.0.11 -b v2.0.11
+        ./autogen.sh
+        autoconf -i
+        ./configure --host=aarch64-thunderx-linux CC=aarch64-thunderx-linux-gnu-gcc --prefix=<numa install dir>
+        make install
+
+The above steps will prepare build system with numa additions. Now this build system can be used
+to build applications for **OCTEON TX** :sup:`®` platforms.
+
+.. code-block:: console
+
+        cd <dpdk directory>
+        export RTE_SDK=$PWD
+        export RTE_KERNELDIR=$THUNDER_ROOT/linux/kernel/linux
+        make config T=arm64-thunderx-linuxapp-gcc
+        make -j CROSS=aarch64-thunderx-linux-gnu- CONFIG_RTE_KNI_KMOD=n CONFIG_RTE_EAL_IGB_UIO=n EXTRA_CFLAGS="-isystem <numa_install_dir>/include" EXTRA_LDFLAGS="-L<numa_install_dir>/lib -lnuma"
+
+If NUMA support is not required, it can be disabled as explained in
+:doc:`../linux_gsg/cross_build_dpdk_for_arm64`.
+
+Following steps could be used in that case.
+
+.. code-block:: console
+
+        make config T=arm64-thunderx-linuxapp-gcc
+        make CROSS=aarch64-thunderx-linux-gnu-
+
+
+SDK and related information can be obtained from: `Cavium support site <https://support.cavium.com/>`_.