[v8,5/7] net/mlx5: add NVGRE decap action to Direct Verbs

Message ID 1541065053-28436-6-git-send-email-dekelp@mellanox.com (mailing list archive)
State Accepted, archived
Delegated to: Shahaf Shuler
Headers
Series add encap and decap actions to Direct Verbs flow in MLX5 PMD |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Dekel Peled Nov. 1, 2018, 9:37 a.m. UTC
This patch implements the NVGRE decap action in DV flow for MLX5 PMD.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
---
 drivers/net/mlx5/mlx5_flow.h    |  4 ++++
 drivers/net/mlx5/mlx5_flow_dv.c | 19 +++++++++++++------
 2 files changed, 17 insertions(+), 6 deletions(-)
  

Patch

diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index c03a3af..104a1e6 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -95,6 +95,7 @@ 
 #define MLX5_FLOW_ACTION_VXLAN_ENCAP (1u << 22)
 #define MLX5_FLOW_ACTION_VXLAN_DECAP (1u << 23)
 #define MLX5_FLOW_ACTION_NVGRE_ENCAP (1u << 24)
+#define MLX5_FLOW_ACTION_NVGRE_DECAP (1u << 25)
 
 #define MLX5_FLOW_FATE_ACTIONS \
 	(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)
@@ -102,6 +103,9 @@ 
 #define MLX5_FLOW_ENCAP_ACTIONS	\
 	(MLX5_FLOW_ACTION_VXLAN_ENCAP | MLX5_FLOW_ACTION_NVGRE_ENCAP)
 
+#define MLX5_FLOW_DECAP_ACTIONS	\
+	(MLX5_FLOW_ACTION_VXLAN_DECAP | MLX5_FLOW_ACTION_NVGRE_DECAP)
+
 #ifndef IPPROTO_MPLS
 #define IPPROTO_MPLS 137
 #endif
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7c29606..6517688 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -127,8 +127,7 @@ 
 		return rte_flow_error_set(error, EINVAL,
 					  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 					  "can't drop and encap in same flow");
-	if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS |
-			    MLX5_FLOW_ACTION_VXLAN_DECAP))
+	if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 		return rte_flow_error_set(error, EINVAL,
 					  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 					  "can only have a single encap or"
@@ -164,8 +163,7 @@ 
 		return rte_flow_error_set(error, EINVAL,
 					  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 					  "can't drop and decap in same flow");
-	if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS |
-			    MLX5_FLOW_ACTION_VXLAN_DECAP))
+	if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
 		return rte_flow_error_set(error, EINVAL,
 					  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 					  "can only have a single encap or"
@@ -745,11 +743,16 @@ 
 			++actions_n;
 			break;
 		case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
+		case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
 			ret = flow_dv_validate_action_l2_decap(action_flags,
 							       attr, error);
 			if (ret < 0)
 				return ret;
-			action_flags |= MLX5_FLOW_ACTION_VXLAN_DECAP;
+			action_flags |= actions->type ==
+					RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
+					MLX5_FLOW_ACTION_VXLAN_DECAP :
+					MLX5_FLOW_ACTION_NVGRE_DECAP;
+
 			++actions_n;
 			break;
 		default:
@@ -1540,6 +1543,7 @@ 
 		actions_n++;
 		break;
 	case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
+	case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
 		dev_flow->dv.actions[actions_n].type =
 			MLX5DV_FLOW_ACTION_IBV_FLOW_ACTION;
 		dev_flow->dv.actions[actions_n].action =
@@ -1548,7 +1552,10 @@ 
 			return -rte_errno;
 		dev_flow->dv.encap_decap_verbs_action =
 			dev_flow->dv.actions[actions_n].action;
-		flow->actions |= MLX5_FLOW_ACTION_VXLAN_DECAP;
+		flow->actions |= action->type ==
+				 RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
+				 MLX5_FLOW_ACTION_VXLAN_DECAP :
+				 MLX5_FLOW_ACTION_NVGRE_DECAP;
 		actions_n++;
 		break;
 	default: