From patchwork Wed Oct 31 07:10:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dekel Peled X-Patchwork-Id: 47601 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 731884F94; Wed, 31 Oct 2018 09:00:38 +0100 (CET) Received: from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129]) by dpdk.org (Postfix) with ESMTP id BEDA52BAB for ; Wed, 31 Oct 2018 09:00:24 +0100 (CET) Received: from Internal Mail-Server by MTLPINE1 (envelope-from dekelp@mellanox.com) with ESMTPS (AES256-SHA encrypted); 31 Oct 2018 09:17:13 +0200 Received: from mtl-vdi-280.wap.labs.mlnx. (mtl-vdi-280.wap.labs.mlnx [10.128.130.87]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w9V7Bn3g020147; Wed, 31 Oct 2018 09:11:57 +0200 From: Dekel Peled To: yskoh@mellanox.com, shahafs@mellanox.com Cc: dev@dpdk.org, orika@mellanox.com Date: Wed, 31 Oct 2018 09:10:44 +0200 Message-Id: <1540969847-48919-5-git-send-email-dekelp@mellanox.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1540498108-18358-1-git-send-email-dekelp@mellanox.com> References: <1540498108-18358-1-git-send-email-dekelp@mellanox.com> Subject: [dpdk-dev] [PATCH v7 4/7] net/mlx5: add NVGRE encap action to Direct Verbs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch implements the nvgre encap action in DV flow for MLX5 PMD. Signed-off-by: Dekel Peled --- drivers/net/mlx5/mlx5_flow.h | 4 ++++ drivers/net/mlx5/mlx5_flow_dv.c | 37 ++++++++++++++++++++++++++++++++----- 2 files changed, 36 insertions(+), 5 deletions(-) diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h index 8955a12..c03a3af 100644 --- a/drivers/net/mlx5/mlx5_flow.h +++ b/drivers/net/mlx5/mlx5_flow.h @@ -94,10 +94,14 @@ #define MLX5_FLOW_ACTION_SET_MAC_DST (1u << 21) #define MLX5_FLOW_ACTION_VXLAN_ENCAP (1u << 22) #define MLX5_FLOW_ACTION_VXLAN_DECAP (1u << 23) +#define MLX5_FLOW_ACTION_NVGRE_ENCAP (1u << 24) #define MLX5_FLOW_FATE_ACTIONS \ (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS) +#define MLX5_FLOW_ENCAP_ACTIONS \ + (MLX5_FLOW_ACTION_VXLAN_ENCAP | MLX5_FLOW_ACTION_NVGRE_ENCAP) + #ifndef IPPROTO_MPLS #define IPPROTO_MPLS 137 #endif diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 7de65bb..7078397 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -126,7 +126,7 @@ return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, NULL, "can't drop and encap in same flow"); - if (action_flags & (MLX5_FLOW_ACTION_VXLAN_ENCAP | + if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_ACTION_VXLAN_DECAP)) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, NULL, @@ -163,7 +163,7 @@ return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, NULL, "can't drop and decap in same flow"); - if (action_flags & (MLX5_FLOW_ACTION_VXLAN_ENCAP | + if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_ACTION_VXLAN_DECAP)) return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, NULL, @@ -376,6 +376,20 @@ vxlan->vx_flags = RTE_BE32(MLX5_VXLAN_GPE_FLAGS); break; + case RTE_FLOW_ITEM_TYPE_GRE: + case RTE_FLOW_ITEM_TYPE_NVGRE: + if (!ipv4 && !ipv6) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, + (void *)item->type, + "ip header not found"); + if ((ipv4 && !ipv4->next_proto_id) || + (ipv6 && !ipv6->proto)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, + (void *)item->type, + "next protocol not found"); + break; case RTE_FLOW_ITEM_TYPE_VOID: break; default: @@ -416,7 +430,11 @@ size_t size = 0; int convert_result = 0; - encap_data = ((const struct rte_flow_action_vxlan_encap *) + if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP) + encap_data = ((const struct rte_flow_action_vxlan_encap *) + action->conf)->definition; + else + encap_data = ((const struct rte_flow_action_nvgre_encap *) action->conf)->definition; convert_result = flow_dv_convert_encap_data(encap_data, buf, &size, error); @@ -705,12 +723,17 @@ ++actions_n; break; case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: + case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: ret = flow_dv_validate_action_l2_encap(action_flags, actions, attr, error); if (ret < 0) return ret; - action_flags |= MLX5_FLOW_ACTION_VXLAN_ENCAP; + action_flags |= actions->type == + RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ? + MLX5_FLOW_ACTION_VXLAN_ENCAP : + MLX5_FLOW_ACTION_NVGRE_ENCAP; + ++actions_n; break; case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: @@ -1492,6 +1515,7 @@ flow->actions |= MLX5_FLOW_ACTION_RSS; break; case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: + case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: dev_flow->dv.actions[actions_n].type = MLX5DV_FLOW_ACTION_IBV_FLOW_ACTION; dev_flow->dv.actions[actions_n].action = @@ -1501,7 +1525,10 @@ return -rte_errno; dev_flow->dv.encap_decap_verbs_action = dev_flow->dv.actions[actions_n].action; - flow->actions |= MLX5_FLOW_ACTION_VXLAN_ENCAP; + flow->actions |= action->type == + RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ? + MLX5_FLOW_ACTION_VXLAN_ENCAP : + MLX5_FLOW_ACTION_NVGRE_ENCAP; actions_n++; break; case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: