diff mbox series

[1/3] doc: update mvsam documentation

Message ID 1536069590-2675-2-git-send-email-tdu@semihalf.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers show
Series crypto/mvsam: align with MUSDK 18.09 | expand

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Tomasz Duszynski Sept. 4, 2018, 1:59 p.m. UTC
From: Dmitri Epshtein <dima@marvell.com>

Update mvsam documentation.

Signed-off-by: Dmitri Epshtein <dima@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
---
 doc/guides/cryptodevs/features/mvsam.ini |  10 +++
 doc/guides/cryptodevs/mvsam.rst          | 147 ++++++++++---------------------
 2 files changed, 57 insertions(+), 100 deletions(-)
diff mbox series

Patch

diff --git a/doc/guides/cryptodevs/features/mvsam.ini b/doc/guides/cryptodevs/features/mvsam.ini
index b7c105a..dd17a4c 100644
--- a/doc/guides/cryptodevs/features/mvsam.ini
+++ b/doc/guides/cryptodevs/features/mvsam.ini
@@ -5,17 +5,22 @@ 
 [Features]
 Symmetric crypto       = Y
 Sym operation chaining = Y
+HW Accelerated         = Y
 
 ;
 ; Supported crypto algorithms of a default crypto driver.
 ;
 [Cipher]
+NULL           = Y
 AES CBC (128)  = Y
 AES CBC (192)  = Y
 AES CBC (256)  = Y
 AES CTR (128)  = Y
 AES CTR (192)  = Y
 AES CTR (256)  = Y
+AES ECB (128)  = Y
+AES ECB (192)  = Y
+AES ECB (256)  = Y
 3DES CBC       = Y
 3DES CTR       = Y
 
@@ -23,10 +28,13 @@  AES CTR (256)  = Y
 ; Supported authentication algorithms of a default crypto driver.
 ;
 [Auth]
+NULL         = Y
 MD5          = Y
 MD5 HMAC     = Y
 SHA1         = Y
 SHA1 HMAC    = Y
+SHA224       = Y
+SHA224 HMAC  = Y
 SHA256       = Y
 SHA256 HMAC  = Y
 SHA384       = Y
@@ -40,3 +48,5 @@  AES GMAC     = Y
 ;
 [AEAD]
 AES GCM (128) = Y
+AES GCM (192) = Y
+AES GCM (256) = Y
diff --git a/doc/guides/cryptodevs/mvsam.rst b/doc/guides/cryptodevs/mvsam.rst
index fd418c2..7acae19 100644
--- a/doc/guides/cryptodevs/mvsam.rst
+++ b/doc/guides/cryptodevs/mvsam.rst
@@ -37,32 +37,50 @@  support by utilizing MUSDK library, which provides cryptographic operations
 acceleration by using Security Acceleration Engine (EIP197) directly from
 user-space with minimum overhead and high performance.
 
+Detailed information about SoCs that use MVSAM crypto driver can be obtained here:
+
+* https://www.marvell.com/embedded-processors/armada-70xx/
+* https://www.marvell.com/embedded-processors/armada-80xx/
+* https://www.marvell.com/embedded-processors/armada-3700/
+
+
 Features
 --------
 
 MVSAM CRYPTO PMD has support for:
 
-* Symmetric crypto
-* Sym operation chaining
-* AES CBC (128)
-* AES CBC (192)
-* AES CBC (256)
-* AES CTR (128)
-* AES CTR (192)
-* AES CTR (256)
-* 3DES CBC
-* 3DES CTR
-* MD5
-* MD5 HMAC
-* SHA1
-* SHA1 HMAC
-* SHA256
-* SHA256 HMAC
-* SHA384
-* SHA384 HMAC
-* SHA512
-* SHA512 HMAC
-* AES GCM (128)
+Cipher algorithms:
+
+* ``RTE_CRYPTO_CIPHER_NULL``
+* ``RTE_CRYPTO_CIPHER_AES_CBC``
+* ``RTE_CRYPTO_CIPHER_AES_CTR``
+* ``RTE_CRYPTO_CIPHER_AES_ECB``
+* ``RTE_CRYPTO_CIPHER_3DES_CBC``
+* ``RTE_CRYPTO_CIPHER_3DES_CTR``
+* ``RTE_CRYPTO_CIPHER_3DES_ECB``
+
+Hash algorithms:
+
+* ``RTE_CRYPTO_AUTH_NULL``
+* ``RTE_CRYPTO_AUTH_MD5``
+* ``RTE_CRYPTO_AUTH_MD5_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA1``
+* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA224``
+* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA256``
+* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA384``
+* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
+* ``RTE_CRYPTO_AUTH_SHA512``
+* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
+* ``RTE_CRYPTO_AUTH_AES_GMAC``
+
+AEAD algorithms:
+
+* ``RTE_CRYPTO_AEAD_AES_GCM``
+
+For supported feature flags please consult :doc:`overview`.
 
 Limitations
 -----------
@@ -77,25 +95,18 @@  MVSAM CRYPTO PMD driver compilation is disabled by default due to external depen
 Currently there are two driver specific compilation options in
 ``config/common_base`` available:
 
-- ``CONFIG_RTE_LIBRTE_MVSAM_CRYPTO`` (default ``n``)
+- ``CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO`` (default: ``n``)
 
     Toggle compilation of the librte_pmd_mvsam driver.
 
-- ``CONFIG_RTE_LIBRTE_MVSAM_CRYPTO_DEBUG`` (default ``n``)
-
-    Toggle display of debugging messages.
-
-For a list of prerequisites please refer to `Prerequisites` section in
-:ref:`MVPP2 Poll Mode Driver <mvpp2_poll_mode_driver>` guide.
-
 MVSAM CRYPTO PMD requires MUSDK built with EIP197 support thus following
 extra option must be passed to the library configuration script:
 
 .. code-block:: console
 
-   --enable-sam
+   --enable-sam [--enable-sam-statistics] [--enable-sam-debug]
 
-For `crypto_safexcel.ko` module build instructions please refer
+For instructions how to build required kernel modules please refer
 to `doc/musdk_get_started.txt`.
 
 Initialization
@@ -106,17 +117,15 @@  loaded:
 
 .. code-block:: console
 
-   insmod musdk_uio.ko
-   insmod mvpp2x_sysfs.ko
-   insmod mv_pp_uio.ko
+   insmod musdk_cma.ko
+   insmod crypto_safexcel.ko rings=0,0
    insmod mv_sam_uio.ko
-   insmod crypto_safexcel.ko
 
 The following parameters (all optional) are exported by the driver:
 
-* max_nb_queue_pairs: maximum number of queue pairs in the device (8 by default).
-* max_nb_sessions: maximum number of sessions that can be created (2048 by default).
-* socket_id: socket on which to allocate the device resources on.
+- ``max_nb_queue_pairs``: maximum number of queue pairs in the device (default: 8 - A8K, 4 - A7K/A3K).
+- ``max_nb_sessions``: maximum number of sessions that can be created (default: 2048).
+- ``socket_id``: socket on which to allocate the device resources on.
 
 l2fwd-crypto example application can be used to verify MVSAM CRYPTO PMD
 operation:
@@ -129,65 +138,3 @@  operation:
      --auth_op GENERATE --auth_algo sha1-hmac \
      --auth_key 10:11:12:13:14:15:16:17:18:19:1a:1b:1c:1d:1e:1f
 
-Example output:
-
-.. code-block:: console
-
-   [...]
-   AAD: at [0x7f253ceb80], len=
-   P ID 0 configuration ----
-   Port mode               : KR
-   MAC status              : disabled
-   Link status             : link up
-   Port speed              : 10G
-   Port duplex             : full
-   Port: Egress enable tx_port_num=16 qmap=0x1
-   PORT: Port0 - link
-   P ID 0 configuration ----
-   Port mode               : KR
-   MAC status              : disabled
-   Link status             : link down
-   Port speed              : 10G
-   Port duplex             : full
-   Port: Egress enable tx_port_num=16 qmap=0x1
-   Port 0, MAC address: 00:50:43:02:21:20
-
-
-   Checking link statusdone
-   Port 0 Link Up - speed 0 Mbps - full-duplex
-   Lcore 0: RX port 0
-   Allocated session pool on socket 0
-   eip197: 0:0 registers: paddr: 0xf2880000, vaddr: 0x0x7f56a80000
-   DMA buffer (131136 bytes) for CDR #0 allocated: paddr = 0xb0585e00, vaddr = 0x7f09384e00
-   DMA buffer (131136 bytes) for RDR #0 allocated: paddr = 0xb05a5f00, vaddr = 0x7f093a4f00
-   DMA buffers allocated for 2049 operations. Tokens - 256 bytes
-   Lcore 0: cryptodev 0
-   L2FWD: lcore 1 has nothing to do
-   L2FWD: lcore 2 has nothing to do
-   L2FWD: lcore 3 has nothing to do
-   L2FWD: entering main loop on lcore 0
-   L2FWD:  -- lcoreid=0 portid=0
-   L2FWD:  -- lcoreid=0 cryptoid=0
-   Options:-
-   nportmask: ffffffff
-   ports per lcore: 1
-   refresh period : 10000
-   single lcore mode: disabled
-   stats_printing: enabled
-   sessionless crypto: disabled
-
-   Crypto chain: Input --> Encrypt --> Auth generate --> Output
-
-   ---- Cipher information ---
-   Algorithm: aes-cbc
-   Cipher key: at [0x7f56db4e80], len=16
-   00000000: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F | ................
-   IV: at [0x7f56db4b80], len=16
-   00000000: 20 F0 63 0E 45 EB 2D 84 72 D4 13 6E 36 B5 AF FE |  .c.E.-.r..n6...
-
-   ---- Authentication information ---
-   Algorithm: sha1-hmac
-   Auth key: at [0x7f56db4d80], len=16
-   00000000: 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F | ................
-   IV: at [0x7f56db4a80], len=0
-   AAD: at [0x7f253ceb80], len=