From patchwork Tue Jun 26 01:24:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhao1, Wei" X-Patchwork-Id: 41505 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 000632C38; Tue, 26 Jun 2018 03:45:11 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 5AFD02C19; Tue, 26 Jun 2018 03:45:10 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jun 2018 18:45:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,272,1526367600"; d="scan'208";a="52231957" Received: from dpdk6.bj.intel.com ([172.16.182.94]) by orsmga008.jf.intel.com with ESMTP; 25 Jun 2018 18:45:07 -0700 From: Wei Zhao To: dev@dpdk.org Cc: wenzhuo.lu@intel.com, qi.z.zhang@intel.com, olivier.matz@6wind.com, stable@dpdk.org, Wei Zhao Date: Tue, 26 Jun 2018 09:24:14 +0800 Message-Id: <1529976254-72268-1-git-send-email-wei.zhao1@intel.com> X-Mailer: git-send-email 2.7.5 In-Reply-To: <1529656727-40207-1-git-send-email-wei.zhao1@intel.com> References: <1529656727-40207-1-git-send-email-wei.zhao1@intel.com> Subject: [dpdk-dev] [PATCH v2] net/ixgbe: fix Tx check descriptor status APIs error X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This is an issue involve RS bit set rule in ixgbe. Let us take function ixgbe_xmit_pkts_vec () as an example, in this function RS bit will be set for descriptor with index txq->tx_next_rs, and also descriptor free function ixgbe_tx_free_bufs() also check RS bit for descriptor with index txq->tx_next_rs, This is perfect ok. Let us take an example, if app set tx_rs_thresh = 32 and nb_desc = 512, then ixgbe PMD code will init txq->tx_next_rs = 31 in function ixgbe_reset_tx_queue when tx queue setup. And also txq->tx_next_rs will be update as 63, 95 and so on. But, in the function ixgbe_dev_tx_descriptor_status(), the RS bit to check is " desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) * txq-tx_rs_thresh", which is 32 ,64, 96 and so on. So, they are all wrong! In tx function of ixgbe_xmit_pkts_simple, the RS bit rule is also the same, it also set index 31 ,64, 95. we need to correct it. Fixes: a2919e13d95e ("net/ixgbe: implement descriptor status API") Signed-off-by: Wei Zhao --- v2: -add not support case for this feature --- drivers/net/ixgbe/ixgbe_rxtx.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index 3e13d26..087657c 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -3145,16 +3145,20 @@ ixgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) if (unlikely(offset >= txq->nb_tx_desc)) return -EINVAL; + if (rte_eth_devices[txq->port_id].tx_pkt_burst == + ixgbe_xmit_pkts) + return -ENOTSUP; + desc = txq->tx_tail + offset; + if (desc >= txq->nb_tx_desc) + desc -= txq->nb_tx_desc; /* go to next desc that has the RS bit */ - desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) * - txq->tx_rs_thresh; - if (desc >= txq->nb_tx_desc) { + desc = (desc / txq->tx_rs_thresh + 1) * + txq->tx_rs_thresh - 1; + if (desc >= txq->nb_tx_desc) desc -= txq->nb_tx_desc; - if (desc >= txq->nb_tx_desc) - desc -= txq->nb_tx_desc; - } + desc = txq->sw_ring[desc].last_id; status = &txq->tx_ring[desc].wb.status; if (*status & rte_cpu_to_le_32(IXGBE_ADVTXD_STAT_DD)) return RTE_ETH_TX_DESC_DONE;