diff mbox series

[v1,02/15] examples/l2fwd: move macro definitions to common header

Message ID 1528971477-14156-3-git-send-email-anoob.joseph@caviumnetworks.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series preparing l2fwd for eventmode additions |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Anoob Joseph June 14, 2018, 10:17 a.m. UTC 
  v1:
* Retaining Intel license with copied code

Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
---
 examples/l2fwd/l2fwd_common.h | 19 +++++++++++++++++++
 examples/l2fwd/main.c         | 16 ++--------------
 2 files changed, 21 insertions(+), 14 deletions(-)
diff mbox series

Patch

diff --git a/examples/l2fwd/l2fwd_common.h b/examples/l2fwd/l2fwd_common.h
index 15059f4..fceb0c3 100644
--- a/examples/l2fwd/l2fwd_common.h
+++ b/examples/l2fwd/l2fwd_common.h
@@ -1,6 +1,25 @@ 
 /* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2016 Intel Corporation
  * Copyright(c) 2018 Cavium, Inc
  */
 #ifndef _L2FWD_COMMON_H_
 #define _L2FWD_COMMON_H_
+
+#define RTE_LOGTYPE_L2FWD RTE_LOGTYPE_USER1
+
+#define MAX_PKT_BURST 32
+#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
+#define MEMPOOL_CACHE_SIZE 256
+
+/*
+ * Configurable number of RX/TX ring descriptors
+ */
+#define RTE_TEST_RX_DESC_DEFAULT 1024
+#define RTE_TEST_TX_DESC_DEFAULT 1024
+
+#define MAX_RX_QUEUE_PER_LCORE 16
+#define MAX_TX_QUEUE_PER_PORT 16
+
+#define MAX_TIMER_PERIOD 86400 /* 1 day max */
+
 #endif /* _L2FWD_COMMON_H_ */
diff --git a/examples/l2fwd/main.c b/examples/l2fwd/main.c
index 6908435..9f873c7 100644
--- a/examples/l2fwd/main.c
+++ b/examples/l2fwd/main.c
@@ -39,22 +39,13 @@ 
 #include <rte_mempool.h>
 #include <rte_mbuf.h>
 
+#include "l2fwd_common.h"
+
 static volatile bool force_quit;
 
 /* MAC updating enabled by default */
 static int mac_updating = 1;
 
-#define RTE_LOGTYPE_L2FWD RTE_LOGTYPE_USER1
-
-#define MAX_PKT_BURST 32
-#define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */
-#define MEMPOOL_CACHE_SIZE 256
-
-/*
- * Configurable number of RX/TX ring descriptors
- */
-#define RTE_TEST_RX_DESC_DEFAULT 1024
-#define RTE_TEST_TX_DESC_DEFAULT 1024
 static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
 static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
 
@@ -69,8 +60,6 @@  static uint32_t l2fwd_dst_ports[RTE_MAX_ETHPORTS];
 
 static unsigned int l2fwd_rx_queue_per_lcore = 1;
 
-#define MAX_RX_QUEUE_PER_LCORE 16
-#define MAX_TX_QUEUE_PER_PORT 16
 struct lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
@@ -100,7 +89,6 @@  struct l2fwd_port_statistics {
 } __rte_cache_aligned;
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
-#define MAX_TIMER_PERIOD 86400 /* 1 day max */
 /* A tsc-based timer responsible for triggering statistics printout */
 static uint64_t timer_period = 10; /* default period is 10 seconds */