From patchwork Thu Apr 19 16:41:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 38572 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E518DEE2D; Thu, 19 Apr 2018 18:42:29 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id E78C2D088 for ; Thu, 19 Apr 2018 18:42:12 +0200 (CEST) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1-us4.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with ESMTPS id C7C6C28005C; Thu, 19 Apr 2018 16:42:11 +0000 (UTC) Received: from sfocexch01r.SolarFlarecom.com (10.20.40.34) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Thu, 19 Apr 2018 09:42:09 -0700 Received: from ocex03.SolarFlarecom.com (10.20.40.36) by sfocexch01r.SolarFlarecom.com (10.20.40.34) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Thu, 19 Apr 2018 09:42:00 -0700 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25 via Frontend Transport; Thu, 19 Apr 2018 09:41:59 -0700 Received: from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com [10.17.10.10]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w3JGfwCF016181; Thu, 19 Apr 2018 17:41:58 +0100 Received: from uklogin.uk.solarflarecom.com (localhost.localdomain [127.0.0.1]) by uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w3JGfwn4028658; Thu, 19 Apr 2018 17:41:58 +0100 From: Andrew Rybchenko To: CC: Ivan Malov Date: Thu, 19 Apr 2018 17:41:48 +0100 Message-ID: <1524156112-28615-5-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1524156112-28615-1-git-send-email-arybchenko@solarflare.com> References: <1523035280-24873-1-git-send-email-arybchenko@solarflare.com> <1524156112-28615-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-MDID: 1524156131-LzBnmBFikPF6 Subject: [dpdk-dev] [PATCH v2 4/8] net/sfc/base: honour packed stream RSS restriction X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Ivan Malov Packed stream firmware variant on EF10 adapters has a number of properties which must be taken into account: - Only one exclusive RSS context is available per port. - Only IP addresses can contribute to the hash value. Huntington and Medford have one more limitation which is important for the drivers capable of packed stream: - Hash algorithm is non-standard (i.e. non-Toeplitz). This implies XORing together source + destination IP addresses (or last four bytes in the case of IPv6) and using the result as the input to a Toeplitz hash. This patch provides a number of improvements in order to treat the mentioned limitations in the common code. If the firmware variant is packed stream, the list of supported hash tuples will include less variants, and the maximum number of RSS contexts will be set to one. Signed-off-by: Ivan Malov Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/ef10_nic.c | 59 +++++++++++++++++++++++++++++++++++----- drivers/net/sfc/base/ef10_rx.c | 6 ++-- drivers/net/sfc/base/efx.h | 14 +++++++++- drivers/net/sfc/base/efx_rx.c | 17 +++++++++--- drivers/net/sfc/base/siena_nic.c | 9 ++++++ 5 files changed, 91 insertions(+), 14 deletions(-) diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c index fa4f7a2..e1f1c2e 100644 --- a/drivers/net/sfc/base/ef10_nic.c +++ b/drivers/net/sfc/base/ef10_nic.c @@ -1239,11 +1239,63 @@ ef10_get_datapath_caps( else encp->enc_fec_counters = B_FALSE; + if (CAP_FLAGS1(req, RX_RSS_LIMITED)) { + /* Only one exclusive RSS context is available per port. */ + encp->enc_rx_scale_max_exclusive_contexts = 1; + + switch (enp->en_family) { + case EFX_FAMILY_MEDFORD2: + encp->enc_rx_scale_hash_alg_mask = + (1U << EFX_RX_HASHALG_TOEPLITZ); + break; + + case EFX_FAMILY_MEDFORD: + case EFX_FAMILY_HUNTINGTON: + /* + * Packed stream firmware variant maintains a + * non-standard algorithm for hash computation. + * It implies explicit XORing together + * source + destination IP addresses (or last + * four bytes in the case of IPv6) and using the + * resulting value as the input to a Toeplitz hash. + */ + encp->enc_rx_scale_hash_alg_mask = + (1U << EFX_RX_HASHALG_PACKED_STREAM); + break; + + default: + rc = EINVAL; + goto fail5; + } + + /* Port numbers cannot contribute to the hash value */ + encp->enc_rx_scale_l4_hash_supported = B_FALSE; + } else { + /* + * Maximum number of exclusive RSS contexts. + * EF10 hardware supports 64 in total, but 6 are reserved + * for shared contexts. They are a global resource so + * not all may be available. + */ + encp->enc_rx_scale_max_exclusive_contexts = 64 - 6; + + encp->enc_rx_scale_hash_alg_mask = + (1U << EFX_RX_HASHALG_TOEPLITZ); + + /* + * It is possible to use port numbers as + * the input data for hash computation. + */ + encp->enc_rx_scale_l4_hash_supported = B_TRUE; + } + #undef CAP_FLAGS1 #undef CAP_FLAGS2 return (0); +fail5: + EFSYS_PROBE(fail5); fail4: EFSYS_PROBE(fail4); fail3: @@ -1713,13 +1765,6 @@ ef10_nic_board_cfg( /* Alignment for WPTR updates */ encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN; - /* - * Maximum number of exclusive RSS contexts. EF10 hardware supports 64 - * in total, but 6 are reserved for shared contexts. They are a global - * resource so not all may be available. - */ - encp->enc_rx_scale_max_exclusive_contexts = 64 - 6; - encp->enc_tx_dma_desc_size_max = EFX_MASK32(ESF_DZ_RX_KER_BYTE_CNT); /* No boundary crossing limits */ encp->enc_tx_dma_desc_boundary = 0; diff --git a/drivers/net/sfc/base/ef10_rx.c b/drivers/net/sfc/base/ef10_rx.c index fc9e342..70e451f 100644 --- a/drivers/net/sfc/base/ef10_rx.c +++ b/drivers/net/sfc/base/ef10_rx.c @@ -609,12 +609,13 @@ ef10_rx_scale_mode_set( __in efx_rx_hash_type_t type, __in boolean_t insert) { + efx_nic_cfg_t *encp = &enp->en_nic_cfg; efx_rc_t rc; - EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ); EFSYS_ASSERT3U(insert, ==, B_TRUE); - if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) { + if ((encp->enc_rx_scale_hash_alg_mask & (1U << alg)) == 0 || + insert == B_FALSE) { rc = EINVAL; goto fail1; } @@ -763,6 +764,7 @@ ef10_rx_prefix_hash( _NOTE(ARGUNUSED(enp)) switch (func) { + case EFX_RX_HASHALG_PACKED_STREAM: case EFX_RX_HASHALG_TOEPLITZ: return (buffer[0] | (buffer[1] << 8) | diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h index 21d2545..0b75f0f 100644 --- a/drivers/net/sfc/base/efx.h +++ b/drivers/net/sfc/base/efx.h @@ -1192,6 +1192,16 @@ typedef struct efx_nic_cfg_s { uint32_t enc_rx_buf_align_start; uint32_t enc_rx_buf_align_end; uint32_t enc_rx_scale_max_exclusive_contexts; + /* + * Mask of supported hash algorithms. + * Hash algorithm types are used as the bit indices. + */ + uint32_t enc_rx_scale_hash_alg_mask; + /* + * Indicates whether port numbers can be included to the + * input data for hash computation. + */ + boolean_t enc_rx_scale_l4_hash_supported; boolean_t enc_rx_scale_additional_modes_supported; #if EFSYS_OPT_LOOPBACK efx_qword_t enc_loopback_types[EFX_LINK_NMODES]; @@ -2067,7 +2077,9 @@ efx_rx_scatter_enable( typedef enum efx_rx_hash_alg_e { EFX_RX_HASHALG_LFSR = 0, - EFX_RX_HASHALG_TOEPLITZ + EFX_RX_HASHALG_TOEPLITZ, + EFX_RX_HASHALG_PACKED_STREAM, + EFX_RX_NHASHALGS } efx_rx_hash_alg_t; /* diff --git a/drivers/net/sfc/base/efx_rx.c b/drivers/net/sfc/base/efx_rx.c index 840a11c..d75957f 100644 --- a/drivers/net/sfc/base/efx_rx.c +++ b/drivers/net/sfc/base/efx_rx.c @@ -302,6 +302,7 @@ efx_rx_scale_hash_flags_get( __out unsigned int *nflagsp) { efx_nic_cfg_t *encp = &enp->en_nic_cfg; + boolean_t l4; boolean_t additional_modes; unsigned int *entryp = flags; efx_rc_t rc; @@ -311,6 +312,7 @@ efx_rx_scale_hash_flags_get( goto fail1; } + l4 = encp->enc_rx_scale_l4_hash_supported; additional_modes = encp->enc_rx_scale_additional_modes_supported; #define LIST_FLAGS(_entryp, _class, _l4_hashing, _additional_modes) \ @@ -339,13 +341,20 @@ efx_rx_scale_hash_flags_get( } while (B_FALSE) switch (hash_alg) { + case EFX_RX_HASHALG_PACKED_STREAM: + if ((encp->enc_rx_scale_hash_alg_mask & (1U << hash_alg)) == 0) + break; + /* FALLTHRU */ case EFX_RX_HASHALG_TOEPLITZ: - LIST_FLAGS(entryp, IPV4_TCP, B_TRUE, additional_modes); - LIST_FLAGS(entryp, IPV6_TCP, B_TRUE, additional_modes); + if ((encp->enc_rx_scale_hash_alg_mask & (1U << hash_alg)) == 0) + break; + + LIST_FLAGS(entryp, IPV4_TCP, l4, additional_modes); + LIST_FLAGS(entryp, IPV6_TCP, l4, additional_modes); if (additional_modes) { - LIST_FLAGS(entryp, IPV4_UDP, B_TRUE, additional_modes); - LIST_FLAGS(entryp, IPV6_UDP, B_TRUE, additional_modes); + LIST_FLAGS(entryp, IPV4_UDP, l4, additional_modes); + LIST_FLAGS(entryp, IPV6_UDP, l4, additional_modes); } LIST_FLAGS(entryp, IPV4, B_FALSE, additional_modes); diff --git a/drivers/net/sfc/base/siena_nic.c b/drivers/net/sfc/base/siena_nic.c index 0d6d071..c3a9495 100644 --- a/drivers/net/sfc/base/siena_nic.c +++ b/drivers/net/sfc/base/siena_nic.c @@ -118,6 +118,15 @@ siena_board_cfg( /* There is one RSS context per function */ encp->enc_rx_scale_max_exclusive_contexts = 1; + encp->enc_rx_scale_hash_alg_mask |= (1U << EFX_RX_HASHALG_LFSR); + encp->enc_rx_scale_hash_alg_mask |= (1U << EFX_RX_HASHALG_TOEPLITZ); + + /* + * It is always possible to use port numbers + * as the input data for hash computation. + */ + encp->enc_rx_scale_l4_hash_supported = B_TRUE; + /* There is no support for additional RSS modes */ encp->enc_rx_scale_additional_modes_supported = B_FALSE;