[dpdk-dev] bus/fslmc: fix the compilation with clang 3.4
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Commit Message
error: redefinition of typedef 'dma_addr_t' is a C11 feature
[-Werror,-Wtypedef-redefinition]
Fixes: 4bc5ab88dbd6 ("net/dpaa2: fix Tx only mode")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/fsl_qbman_base.h | 2 --
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 3 +++
drivers/net/dpaa2/dpaa2_rxtx.c | 4 ++--
3 files changed, 5 insertions(+), 4 deletions(-)
Comments
Hi Hemant,
On 04/19/2018 02:32 PM, Hemant Agrawal wrote:
> error: redefinition of typedef 'dma_addr_t' is a C11 feature
> [-Werror,-Wtypedef-redefinition]
>
> Fixes: 4bc5ab88dbd6 ("net/dpaa2: fix Tx only mode")
> Cc: stable@dpdk.org
>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
> drivers/bus/fslmc/qbman/include/fsl_qbman_base.h | 2 --
> drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 3 +++
> drivers/net/dpaa2/dpaa2_rxtx.c | 4 ++--
> 3 files changed, 5 insertions(+), 4 deletions(-)
>
Tested-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Thanks!
Maxime
19/04/2018 15:21, Maxime Coquelin:
> On 04/19/2018 02:32 PM, Hemant Agrawal wrote:
> > error: redefinition of typedef 'dma_addr_t' is a C11 feature
> > [-Werror,-Wtypedef-redefinition]
> >
> > Fixes: 4bc5ab88dbd6 ("net/dpaa2: fix Tx only mode")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
>
> Tested-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Applied, thanks
@@ -6,8 +6,6 @@
#ifndef _FSL_QBMAN_BASE_H
#define _FSL_QBMAN_BASE_H
-typedef uint64_t dma_addr_t;
-
/**
* DOC: QBMan basic structures
*
@@ -30,6 +30,9 @@
#include "dpaa2_sec_priv.h"
#include "dpaa2_sec_logs.h"
+/* Required types */
+typedef uint64_t dma_addr_t;
+
/* RTA header files */
#include <hw/desc/ipsec.h>
#include <hw/desc/algo.h>
@@ -481,7 +481,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
q_storage->last_num_pkts);
qbman_pull_desc_set_fq(&pulldesc, fqid);
qbman_pull_desc_set_storage(&pulldesc, dq_storage,
- (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
+ (uint64_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
if (check_swp_active_dqs(DPAA2_PER_LCORE_ETHRX_DPIO->index)) {
while (!qbman_check_command_complete(
get_swp_active_dqs(
@@ -517,7 +517,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
qbman_pull_desc_set_numframes(&pulldesc, DPAA2_DQRR_RING_SIZE);
qbman_pull_desc_set_fq(&pulldesc, fqid);
qbman_pull_desc_set_storage(&pulldesc, dq_storage1,
- (dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage1)), 1);
+ (uint64_t)(DPAA2_VADDR_TO_IOVA(dq_storage1)), 1);
/* Check if the previous issued command is completed.
* Also seems like the SWP is shared between the Ethernet Driver