diff mbox

[dpdk-dev,27/30] crypto/qat: cleanups

Message ID 1523040732-3290-28-git-send-email-fiona.trahe@intel.com (mailing list archive)
State Superseded, archived
Delegated to: Pablo de Lara Guarch
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation fail apply issues

Commit Message

Fiona Trahe April 6, 2018, 6:52 p.m. UTC 
- renamed sgl_cookie to cookie
 - renamed qp_gen_config to qat_gen_config as it is intended
   to hold more than just qp data.
 - removed unused macro - ALIGN_POW2
 - moved 64_BYTE_ALIGN to qat_common.h
 - removed crypto reference in common debug msg
 - free cookie pool on qp creation error

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
---
 drivers/crypto/qat/qat_common.c  |  2 +-
 drivers/crypto/qat/qat_common.h  |  2 ++
 drivers/crypto/qat/qat_device.c  |  2 +-
 drivers/crypto/qat/qat_device.h  |  2 +-
 drivers/crypto/qat/qat_qp.c      |  3 +++
 drivers/crypto/qat/qat_sym.h     |  8 --------
 drivers/crypto/qat/qat_sym_pmd.c | 14 +++++++-------
 7 files changed, 15 insertions(+), 18 deletions(-)
diff mbox

Patch

diff --git a/drivers/crypto/qat/qat_common.c b/drivers/crypto/qat/qat_common.c
index 5d6779757..c10c1421a 100644
--- a/drivers/crypto/qat/qat_common.c
+++ b/drivers/crypto/qat/qat_common.c
@@ -103,5 +103,5 @@  void qat_stats_reset(struct qat_pci_device *dev,
 		memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
 	}
 
-	PMD_DRV_LOG(DEBUG, "QAT crypto: %d stats cleared", service);
+	PMD_DRV_LOG(DEBUG, "QAT: %d stats cleared", service);
 }
diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h
index 8ecebe954..db85d5482 100644
--- a/drivers/crypto/qat/qat_common.h
+++ b/drivers/crypto/qat/qat_common.h
@@ -15,6 +15,8 @@ 
  */
 #define QAT_SGL_MAX_NUMBER	16
 
+#define QAT_64_BTYE_ALIGN_MASK (~0x3f)
+
 /* Intel(R) QuickAssist Technology device generation is enumerated
  * from one according to the generation of the device
  */
diff --git a/drivers/crypto/qat/qat_device.c b/drivers/crypto/qat/qat_device.c
index d1e103efd..27f08874e 100644
--- a/drivers/crypto/qat/qat_device.c
+++ b/drivers/crypto/qat/qat_device.c
@@ -10,7 +10,7 @@ 
 
 /* Hardware device information per generation */
 __extension__
-struct qat_gen_hw_data qp_gen_config[] =  {
+struct qat_gen_hw_data qat_gen_config[] =  {
 	[QAT_GEN1] = {
 		.dev_gen = QAT_GEN1,
 		.qp_hw_data = qat_gen1_qps,
diff --git a/drivers/crypto/qat/qat_device.h b/drivers/crypto/qat/qat_device.h
index fd20a0147..4201a1c71 100644
--- a/drivers/crypto/qat/qat_device.h
+++ b/drivers/crypto/qat/qat_device.h
@@ -62,7 +62,7 @@  struct qat_gen_hw_data {
 	const struct qat_qp_hw_data (*qp_hw_data)[ADF_MAX_QPS_ON_ANY_SERVICE];
 };
 
-extern struct qat_gen_hw_data qp_gen_config[];
+extern struct qat_gen_hw_data qat_gen_config[];
 
 struct qat_pci_device *
 qat_pci_device_allocate(struct rte_pci_device *pci_dev);
diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index 8fbdf85b8..06ffac47b 100644
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -266,6 +266,9 @@  int qat_qp_setup(struct qat_pci_device *qat_dev,
 	return 0;
 
 create_err:
+	if (qp->op_cookie_pool)
+		rte_mempool_free(qp->op_cookie_pool);
+	rte_free(qp->op_cookies);
 	rte_free(qp);
 	return -EFAULT;
 }
diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h
index d887dc126..bdb672be4 100644
--- a/drivers/crypto/qat/qat_sym.h
+++ b/drivers/crypto/qat/qat_sym.h
@@ -9,14 +9,6 @@ 
 
 #include "qat_common.h"
 
-/*
- * This macro rounds up a number to a be a multiple of
- * the alignment when the alignment is a power of 2
- */
-#define ALIGN_POW2_ROUNDUP(num, align) \
-	(((num) + (align) - 1) & ~((align) - 1))
-#define QAT_64_BTYE_ALIGN_MASK (~0x3f)
-
 struct qat_sym_session;
 
 struct qat_sym_op_cookie {
diff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c
index aa71b4641..e6760b8f8 100644
--- a/drivers/crypto/qat/qat_sym_pmd.c
+++ b/drivers/crypto/qat/qat_sym_pmd.c
@@ -68,7 +68,7 @@  static void qat_sym_dev_info_get(struct rte_cryptodev *dev,
 {
 	struct qat_sym_dev_private *internals = dev->data->dev_private;
 	const struct qat_qp_hw_data *sym_hw_qps =
-		qp_gen_config[internals->qat_dev->qat_dev_gen]
+		qat_gen_config[internals->qat_dev->qat_dev_gen]
 			      .qp_hw_data[QAT_SERVICE_SYMMETRIC];
 
 	PMD_INIT_FUNC_TRACE();
@@ -143,7 +143,7 @@  static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 			(struct qat_qp **)&(dev->data->queue_pairs[qp_id]);
 	struct qat_sym_dev_private *qat_private = dev->data->dev_private;
 	const struct qat_qp_hw_data *sym_hw_qps =
-			qp_gen_config[qat_private->qat_dev->qat_dev_gen]
+			qat_gen_config[qat_private->qat_dev->qat_dev_gen]
 				      .qp_hw_data[QAT_SERVICE_SYMMETRIC];
 	const struct qat_qp_hw_data *qp_hw_data = sym_hw_qps + qp_id;
 
@@ -178,16 +178,16 @@  static int qat_sym_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
 
 	for (i = 0; i < qp->nb_descriptors; i++) {
 
-		struct qat_sym_op_cookie *sql_cookie =
+		struct qat_sym_op_cookie *cookie =
 				qp->op_cookies[i];
 
-		sql_cookie->qat_sgl_src_phys_addr =
-				rte_mempool_virt2iova(sql_cookie) +
+		cookie->qat_sgl_src_phys_addr =
+				rte_mempool_virt2iova(cookie) +
 				offsetof(struct qat_sym_op_cookie,
 				qat_sgl_src);
 
-		sql_cookie->qat_sgl_dst_phys_addr =
-				rte_mempool_virt2iova(sql_cookie) +
+		cookie->qat_sgl_dst_phys_addr =
+				rte_mempool_virt2iova(cookie) +
 				offsetof(struct qat_sym_op_cookie,
 				qat_sgl_dst);
 	}