From patchwork Fri Jan 5 14:10:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tonghao Zhang X-Patchwork-Id: 32991 X-Patchwork-Delegate: helin.zhang@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D8B781B1A6; Fri, 5 Jan 2018 15:12:02 +0100 (CET) Received: from mail-pf0-f193.google.com (mail-pf0-f193.google.com [209.85.192.193]) by dpdk.org (Postfix) with ESMTP id 80AA61B1A6 for ; Fri, 5 Jan 2018 15:12:01 +0100 (CET) Received: by mail-pf0-f193.google.com with SMTP id a90so2227074pfk.1 for ; Fri, 05 Jan 2018 06:12:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PI+q/ROAJ1pBNGOyYHOasXRUCBdvIjNbjJWDm6CINpY=; b=LWt050F4FCfYG2HHpYxJUeZbxWAQBAPQv1b38xZLAZcRYbd0lEPSokA+cSNhV9PzO/ 0UznioTsHLq8eBuuZiHZFaD0k8AT/JIG+SewJ+vgfEvSV43jmjAFEbkAakSa9wklmNnw Q99G/kqOX17ZmZvTreDgqzid6Icf/Xl6EgV/z5UJIyogNH/49DJjZaKBWzQp4EqWhJU/ Y5iIReQK7wch514v5tFhEuoS4lPUtBKzwdYXr6N+TWpNlejIbHQqgBc6jokJtEPlNWaH fMTAA0sKBupq0IwZ0VQt72VLycFOmppno9KhbmQJ1aTi8dUcBGQK/wmkTl2Orb7FeUmt OkWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PI+q/ROAJ1pBNGOyYHOasXRUCBdvIjNbjJWDm6CINpY=; b=QFFeBulkSYsGM1DwwWeod7/qcehnyGUyMzSvi5f19JXSmUpaarPrLImVLcnmEgbjie 8IloJICeJpdt7xmXYC8pg1onwp92JYKl1ZINrTDvxqAepetzzhPfozyNfizerZsAKtPr 1YFaiBe/1CSsNlLm7c97lOy1MM+REMt4R06f+UMl2g61LJ1q2Z8h7T+sAYDlY3JskAcA gznGDbHo+4fwkEUjXsjYyc29zs4W8sfI919v0ooMHQSohRH5ULgIHwczr9URFAAB42oD jeHowozIsxMm7lIo0cMwThAburg8kEu0TJcHtfBHfIsMCLF7wk6nygvoC6ToHhYgzdJv pnUQ== X-Gm-Message-State: AKGB3mKgh5SP1t6/H80sJiPwqrxq+infPVMKB7QSCoIGXA9dNQI7VmwA wpmF4NKrLSaELv/zQ1p9GsnPFByGVHI= X-Google-Smtp-Source: ACJfBovQxHypxAOCVZWz3TZ6VsgQpkI3xMxKsJ1FLTBMjdCZ5U94j+wv6W4yEe845SrOHc5sFHY5TA== X-Received: by 10.99.125.5 with SMTP id y5mr2767114pgc.354.1515161520596; Fri, 05 Jan 2018 06:12:00 -0800 (PST) Received: from local.opencloud.tech.localdomain ([219.147.95.160]) by smtp.gmail.com with ESMTPSA id w19sm12990407pfa.127.2018.01.05.06.11.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 05 Jan 2018 06:12:00 -0800 (PST) From: Tonghao Zhang To: dev@dpdk.org Cc: Tonghao Zhang Date: Fri, 5 Jan 2018 06:10:38 -0800 Message-Id: <1515161439-4792-4-git-send-email-xiangxia.m.yue@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1515161439-4792-1-git-send-email-xiangxia.m.yue@gmail.com> References: <1515161439-4792-1-git-send-email-xiangxia.m.yue@gmail.com> Subject: [dpdk-dev] [PATCH 4/5] net/ixgbevf: add check for rte_intr_enable. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When we bind the ixgbevf to vfio and call the rte_eth_dev_rx_intr_enable and rte_eth_dev_rx_intr_disable frequently, the interrupt setting (msi_set_mask_bit) will take more CPU as show below. rte_intr_enable call the ioctl to map the fd to interrupts frequently. perf top: 5.45% [kernel] [k] msi_set_mask_bit It is unnecessary to call the rte_intr_enable in ixgbe_dev_rx_queue_intr_enable. because the fds has been mapped to interrupt and not unmapped in ixgbe_dev_rx_queue_intr_disable. This patch add checks for using VFIO. With the patch, msi_set_mask_bit is not listed in perl any more. Any suggestion will be welcome. Signed-off-by: Tonghao Zhang --- drivers/net/ixgbe/ixgbe_ethdev.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index e929235..79e4097 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -5610,7 +5610,9 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) RTE_SET_USED(queue_id); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); - rte_intr_enable(intr_handle); + if (intr_handle->type == RTE_INTR_HANDLE_UIO || + intr_handle->type == RTE_INTR_HANDLE_UIO_INTX) + rte_intr_enable(intr_handle); return 0; } @@ -5659,7 +5661,10 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) mask &= (1 << (queue_id - 32)); IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); } - rte_intr_enable(intr_handle); + + if (intr_handle->type == RTE_INTR_HANDLE_UIO || + intr_handle->type == RTE_INTR_HANDLE_UIO_INTX) + rte_intr_enable(intr_handle); return 0; }