From patchwork Fri Jan 5 13:57:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tonghao Zhang X-Patchwork-Id: 32986 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EE80C1B1A1; Fri, 5 Jan 2018 14:58:12 +0100 (CET) Received: from mail-pl0-f66.google.com (mail-pl0-f66.google.com [209.85.160.66]) by dpdk.org (Postfix) with ESMTP id 9C5641B16E for ; Fri, 5 Jan 2018 14:58:11 +0100 (CET) Received: by mail-pl0-f66.google.com with SMTP id s3so3076144plp.4 for ; Fri, 05 Jan 2018 05:58:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=s+Bn1d3WUqkD7uHfF4SWKV762+xo8GoMZoBYO90fOuA=; b=f+agP2/fArpnoTuMKF8PkCCkQNwWTKPCYYTzQYDMWqqc9IuUvoKcCDBV7NhiNlW51K 06BiTxLxFbHDpRSj6/T90gm1y+8BtGnD9OWwTBtRjeTEBolKAJPHdKTHAJLn7KmJiSg1 21UXffshrr9nYOeS5mkwv6glS3V5iZcUNNu2A8K1HtlWfXpQoyMdHNKwHC/XexiGC8VE PTSXLf3ppDgsDmwW40L03puhBUIMyQfSMtx+HPaP+K/XZ0chMO5RBla28S2Iks3JuysN wIPgwgM+6VI7IVek2YhN7EbzEzgxFP3KIevV5YbFisphNExlF4CPTmjt75yoIyi/yw+s GX9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=s+Bn1d3WUqkD7uHfF4SWKV762+xo8GoMZoBYO90fOuA=; b=msBLtzyAFa7vGJ75O2ezXGsUzHgeD+16aTKsUkbL5uPTGxjy49UPcVgghzQRsRvm4d B66X03BtA0qNZ10RNrP8f5Fv2qFtqPVlc6b6Gzv/Bimzms3zkFqqUZiPPgQpCJARbvKL OVZkRT59PLNdO2bt43+VsaMMwNOfDhyKYSDQwZeP/8HsFiokI1GEYyIYV/r6tUX2xu5G O63BSarFb9orSvDbRxVgPiSbzZJnwcJiqRq0vB6NiVf9ql38yBTFXtkZ0hvmbNUrqQVL AajDMEfq0xGtsoUGRNxPBAo8/cCU8CZp6liWj0112wSZXlaHgJL72VDmm/SCPWuTFTNI Nk1A== X-Gm-Message-State: AKGB3mIVUGD2di5NXztzUzgKNrojX/zF8RZ660Sk5z6XIE2Q/Dsg7Z1y 9qS1T2bmMTZ/bT/mBvpCjmB1PRex X-Google-Smtp-Source: ACJfBotOzLm+aFA2wqsCH5mkOMgPoI+8eC0YENYj45oJGkXIOsh+jeI9B3J/2R7Q9QPM/ibGJDh/bw== X-Received: by 10.159.198.73 with SMTP id y9mr3258423plt.385.1515160690541; Fri, 05 Jan 2018 05:58:10 -0800 (PST) Received: from local.opencloud.tech.localdomain ([183.240.196.56]) by smtp.gmail.com with ESMTPSA id z19sm12390783pfh.39.2018.01.05.05.58.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 05 Jan 2018 05:58:10 -0800 (PST) From: Tonghao Zhang To: dev@dpdk.org Cc: Tonghao Zhang Date: Fri, 5 Jan 2018 05:57:55 -0800 Message-Id: <1515160676-4296-4-git-send-email-xiangxia.m.yue@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1515160676-4296-1-git-send-email-xiangxia.m.yue@gmail.com> References: <1515160676-4296-1-git-send-email-xiangxia.m.yue@gmail.com> Subject: [dpdk-dev] [PATCH 4/5] net/ixgbevf: add check for rte_intr_enable. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When we bind the ixgbevf to vfio and call the rte_eth_dev_rx_intr_enable and rte_eth_dev_rx_intr_disable frequently, the interrupt setting (msi_set_mask_bit) will take more CPU as show below. rte_intr_enable call the ioctl to map the fd to interrupts frequently. perf top: 5.45% [kernel] [k] msi_set_mask_bit It is unnecessary to call the rte_intr_enable in ixgbe_dev_rx_queue_intr_enable. because the fds has been mapped to interrupt and not unmapped in ixgbe_dev_rx_queue_intr_disable. This patch add checks for using VFIO. With the patch, msi_set_mask_bit is not listed in perl any more. Any suggestion will be welcome. Signed-off-by: Tonghao Zhang --- drivers/net/ixgbe/ixgbe_ethdev.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index e929235..79e4097 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -5610,7 +5610,9 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) RTE_SET_USED(queue_id); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); - rte_intr_enable(intr_handle); + if (intr_handle->type == RTE_INTR_HANDLE_UIO || + intr_handle->type == RTE_INTR_HANDLE_UIO_INTX) + rte_intr_enable(intr_handle); return 0; } @@ -5659,7 +5661,10 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) mask &= (1 << (queue_id - 32)); IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask); } - rte_intr_enable(intr_handle); + + if (intr_handle->type == RTE_INTR_HANDLE_UIO || + intr_handle->type == RTE_INTR_HANDLE_UIO_INTX) + rte_intr_enable(intr_handle); return 0; }