From patchwork Wed Mar 29 12:42:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jasvinder Singh X-Patchwork-Id: 22700 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id C21E9F958; Wed, 29 Mar 2017 15:40:18 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id BEB0BD47A for ; Wed, 29 Mar 2017 14:32:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490790744; x=1522326744; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=V6+Q0oNZZcFnJgP6bqf7CW21tLsIms0/3SNs8CzmYQA=; b=x/ZJMHaaFyxryYB1hid2E6zDK7Wp92BKvw0CKL80pZcqKCB7GvchBHd6 ps2KrbbC7QZMXJXkdpWNyvucuTWxGg==; Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Mar 2017 05:32:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.36,241,1486454400"; d="scan'208"; a="1113265709" Received: from silpixa00381635.ir.intel.com (HELO silpixa00381635.ger.corp.intel.com) ([10.237.222.149]) by orsmga001.jf.intel.com with ESMTP; 29 Mar 2017 05:32:23 -0700 From: Jasvinder Singh To: dev@dpdk.org Cc: olivier.matz@6wind.com, declan.doherty@intel.com, pablo.de.lara.guarch@intel.com Date: Wed, 29 Mar 2017 13:42:12 +0100 Message-Id: <1490791332-126476-3-git-send-email-jasvinder.singh@intel.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1490791332-126476-1-git-send-email-jasvinder.singh@intel.com> References: <1490107540-66614-2-git-send-email-jasvinder.singh@intel.com> <1490791332-126476-1-git-send-email-jasvinder.singh@intel.com> Subject: [dpdk-dev] [PATCH v6 2/2] test/test: add unit test for CRC computation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch provides a set of tests for verifying the functional correctness of 16-bit and 32-bit CRC APIs. Signed-off-by: Jasvinder Singh Acked-by: Pablo de Lara --- test/test/Makefile | 2 + test/test/test_crc.c | 241 +++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 243 insertions(+) create mode 100644 test/test/test_crc.c diff --git a/test/test/Makefile b/test/test/Makefile index 79f0c61..06d8d5d 100644 --- a/test/test/Makefile +++ b/test/test/Makefile @@ -160,6 +160,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_CMDLINE) += test_cmdline_cirbuf.c SRCS-$(CONFIG_RTE_LIBRTE_CMDLINE) += test_cmdline_string.c SRCS-$(CONFIG_RTE_LIBRTE_CMDLINE) += test_cmdline_lib.c +SRCS-$(CONFIG_RTE_LIBRTE_NET) += test_crc.c + ifeq ($(CONFIG_RTE_LIBRTE_SCHED),y) SRCS-y += test_red.c SRCS-y += test_sched.c diff --git a/test/test/test_crc.c b/test/test/test_crc.c new file mode 100644 index 0000000..c25790d --- /dev/null +++ b/test/test/test_crc.c @@ -0,0 +1,241 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2017 Intel Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "test.h" + +#include +#include + +#define CRC_VEC_LEN 32 +#define CRC32_VEC_LEN1 1512 +#define CRC32_VEC_LEN2 348 +#define CRC16_VEC_LEN1 12 +#define CRC16_VEC_LEN2 2 +#define LINE_LEN 75 + +/* CRC test vector */ +static const uint8_t crc_vec[CRC_VEC_LEN] = { + '0', '1', '2', '3', '4', '5', '6', '7', + '8', '9', 'a', 'b', 'c', 'd', 'e', 'f', + 'g', 'h', 'i', 'j', 'A', 'B', 'C', 'D', + 'E', 'F', 'G', 'H', 'I', 'J', 'K', 'L', +}; + +/* 32-bit CRC test vector */ +static const uint8_t crc32_vec1[12] = { + 0xBE, 0xD7, 0x23, 0x47, 0x6B, 0x8F, + 0xB3, 0x14, 0x5E, 0xFB, 0x35, 0x59, +}; + +/* 16-bit CRC test vector 1 */ +static const uint8_t crc16_vec1[CRC16_VEC_LEN1] = { + 0x0D, 0x01, 0x01, 0x23, 0x45, 0x67, + 0x89, 0x01, 0x23, 0x45, 0x00, 0x01, +}; + +/* 16-bit CRC test vector 2 */ +static const uint8_t crc16_vec2[CRC16_VEC_LEN2] = { + 0x03, 0x3f, +}; +/** CRC results */ +static const uint32_t crc32_vec_res = 0xb491aab4; +static const uint32_t crc32_vec1_res = 0xac54d294; +static const uint32_t crc32_vec2_res = 0xefaae02f; +static const uint32_t crc16_vec_res = 0x6bec; +static const uint16_t crc16_vec1_res = 0x8cdd; +static const uint16_t crc16_vec2_res = 0xec5b; + +static int +crc_calc(const uint8_t *vec, + uint32_t vec_len, + enum rte_net_crc_type type) +{ + /* compute CRC */ + uint32_t ret = rte_net_crc_calc(vec, vec_len, type); + + /* dump data on console */ + TEST_HEXDUMP(stdout, NULL, vec, vec_len); + + return ret; +} + +static int +test_crc_scalar(void) +{ + uint32_t i; + enum rte_net_crc_type type; + uint8_t *test_data; + uint32_t ret; + + /* 32-bit ethernet CRC: scalar result */ + type = RTE_NET_CRC32_ETH; + ret = crc_calc(crc_vec, CRC_VEC_LEN, type); + if (ret != crc32_vec_res) { + printf("test_crc(32-bit, scalar): test1 failed!!\n"); + return -1; + } + + /* 32-bit ethernet CRC scalar result*/ + test_data = rte_zmalloc(NULL, CRC32_VEC_LEN1, 0); + + for (i = 0; i < CRC32_VEC_LEN1; i += 12) + rte_memcpy(&test_data[i], crc32_vec1, 12); + + ret = crc_calc(test_data, CRC32_VEC_LEN1, type); + if (ret != crc32_vec1_res) { + printf("test_crc(32-bit, scalar): test2 failed!!\n"); + rte_free(test_data); + return -1; + } + + /* 32-bit ethernet CRC scalar result */ + for (i = 0; i < CRC32_VEC_LEN2; i += 12) + rte_memcpy(&test_data[i], crc32_vec1, 12); + + ret = crc_calc(test_data, CRC32_VEC_LEN2, type); + if (ret != crc32_vec2_res) { + printf("test_crc(32-bit, scalar): test3 failed!!\n"); + rte_free(test_data); + return -1; + } + + /* 16-bit CCITT CRC scalar result */ + type = RTE_NET_CRC16_CCITT; + ret = crc_calc(crc_vec, CRC_VEC_LEN, type); + if (ret != crc16_vec_res) { + printf("test_crc (16-bit, scalar): test4 failed!!\n"); + return -1; + } + + /* 16-bit CCITT CRC scalar result */ + ret = crc_calc(crc16_vec1, CRC16_VEC_LEN1, type); + if (ret != crc16_vec1_res) { + printf("test_crc (16-bit, scalar): test5 failed!!\n"); + return -1; + } + /* 16-bit CCITT CRC scalar result*/ + ret = crc_calc(crc16_vec2, CRC16_VEC_LEN2, type); + if (ret != crc16_vec2_res) { + printf("test_crc (16-bit, scalar): test6 failed!!\n"); + return -1; + } + + rte_free(test_data); + return 0; +} + +static int +test_crc_x86_sse42(void) +{ + uint32_t i; + enum rte_net_crc_type type; + uint8_t *test_data; + uint32_t ret; + + /* 32-bit ethernet CRC: Test 1 */ + type = RTE_NET_CRC32_ETH; + + ret = crc_calc(crc_vec, CRC_VEC_LEN, type); + if (ret != crc32_vec_res) { + printf("test_crc(32-bit, x86_SSE4.2): test7 failed!!\n"); + return -1; + } + + /* 32-bit ethernet CRC: Test 2 */ + test_data = rte_zmalloc(NULL, CRC32_VEC_LEN1, 0); + + for (i = 0; i < CRC32_VEC_LEN1; i += 12) + rte_memcpy(&test_data[i], crc32_vec1, 12); + + ret = crc_calc(test_data, CRC32_VEC_LEN1, type); + if (ret != crc32_vec1_res) { + printf("test_crc(32-bit, x86_SSE4.2): test8 failed!!\n"); + rte_free(test_data); + return -1; + } + + /* 32-bit ethernet CRC: Test 3 */ + for (i = 0; i < CRC32_VEC_LEN2; i += 12) + rte_memcpy(&test_data[i], crc32_vec1, 12); + + ret = crc_calc(test_data, CRC32_VEC_LEN2, type); + if (ret != crc32_vec2_res) { + printf("test_crc(32-bit, x86_SSE4.2): test9 failed!!\n"); + rte_free(test_data); + return -1; + } + + + /* 16-bit CCITT CRC: Test 4 */ + type = RTE_NET_CRC16_CCITT; + ret = crc_calc(crc_vec, CRC_VEC_LEN, type); + if (ret != crc16_vec_res) { + printf("test_crc (16-bit, x86_SSE4.2): test10 failed!!\n"); + return -1; + } + + /* 16-bit CCITT CRC: Test 5 */ + ret = crc_calc(crc16_vec1, CRC16_VEC_LEN1, type); + if (ret != crc16_vec1_res) { + printf("test_crc (16-bit, x86_SSE4.2): test11 failed!!\n"); + return -1; + } + + /* 16-bit CCITT CRC: Test 6 */ + ret = crc_calc(crc16_vec2, CRC16_VEC_LEN2, type); + if (ret != crc16_vec2_res) { + printf("test_crc (16-bit, x86_SSE4.2): test12 failed!!\n"); + return -1; + } + + rte_free(test_data); + return 0; +} + +static int +test_crc(void) +{ + /* set CRC scalar mode */ + rte_net_crc_set_alg(RTE_NET_CRC_SCALAR); + if (test_crc_scalar() == -1) + return -1; + + /* set CRC sse4.2 mode */ + rte_net_crc_set_alg(RTE_NET_CRC_SSE42); + if (test_crc_x86_sse42() == -1) + return -1; + + return 0; +} + +REGISTER_TEST_COMMAND(crc_autotest, test_crc);