From patchwork Fri Dec 23 15:58:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Blunck X-Patchwork-Id: 18498 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id BCC86F933; Fri, 23 Dec 2016 16:59:16 +0100 (CET) Received: from mail-wj0-f193.google.com (mail-wj0-f193.google.com [209.85.210.193]) by dpdk.org (Postfix) with ESMTP id C1FA2532C for ; Fri, 23 Dec 2016 16:58:47 +0100 (CET) Received: by mail-wj0-f193.google.com with SMTP id qs7so3092454wjc.1 for ; Fri, 23 Dec 2016 07:58:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=HfYGicPXgLlV8o3HirEjYcOrsyYYZ78YCpQL8kasDkU=; b=dILBqNIG638memLQxKsrqjAU7HdeKxquH22DDrNwHqV8o6EgTPGN5/fnW8vzgzhRSU 3IeHxILdxljxELM9OISGOPgPF0OLBHsmvbZAanQ7OjNjOKQrLPmk+S1BUTdTO/daUS5+ hWb4cFM5Vw+Mkjt8/0MAkbBU1TkYwvJEo2ivx8yhHRf4g1hUvqwcd2zBwhTXWJ7WbseE qB27bDlAYY/MC0JeQtk/Vl4nukIfu3vGmIZGnCekTp5ZuZR5cFXM+nEssEgwQ4CbC96P /yzbAXw1Z/YJU5Bl8eCMMfEB4kaoKnqN23uSGw9vqnSzP9b5R87ZCPAIlpzrZ4Z+rghr bbDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:in-reply-to:references; bh=HfYGicPXgLlV8o3HirEjYcOrsyYYZ78YCpQL8kasDkU=; b=qg7MftNytJgN496RpLscezCpWrgDb4DWa3fFVK+zaKd4AGqtTgWGChHsiyg/fgaZgt Py78tawvfAEjKOW+91fOyoPg+fA2UXXtk0ejC6kv7kEsiZrMrsoqK4vGrZyw/044I+b6 +GWUe+mOmQ/E8r9Tpj7OZLgpHJI0jt7EEXAeds9tn7lrieerF94goHGj/FhF2CCqW4IW PBLjO3iOef29dblGrU9JmS/hu9JprKnHDA2sTs/h+eKeeWKLDpLbKXEeY8/S///Vx1b2 I5Y0FwkdJbaq2pcXzOYD7J2/uZrD6Of66IqTJ5ATTKaaSrEszfo7WJWpULe4svgd9E39 kEYw== X-Gm-Message-State: AIkVDXKi8SXVhozkMcX6z/J2oZtxPJOOROV94izb6aUrxXuRBJnNRYkWShqXER2Sm+DiXA== X-Received: by 10.194.17.34 with SMTP id l2mr11609462wjd.79.1482508727224; Fri, 23 Dec 2016 07:58:47 -0800 (PST) Received: from weierstrass.local.net ([91.200.109.169]) by smtp.gmail.com with ESMTPSA id jm6sm41027072wjb.27.2016.12.23.07.58.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Dec 2016 07:58:46 -0800 (PST) From: Jan Blunck To: dev@dpdk.org Cc: shreyansh.jain@nxp.com, david.marchand@6wind.com, stephen@networkplumber.org Date: Fri, 23 Dec 2016 16:58:06 +0100 Message-Id: <1482508691-11408-16-git-send-email-jblunck@infradead.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1482508691-11408-1-git-send-email-jblunck@infradead.org> References: <1482508691-11408-1-git-send-email-jblunck@infradead.org> In-Reply-To: <1482332986-7599-1-git-send-email-jblunck@infradead.org> References: <1482332986-7599-1-git-send-email-jblunck@infradead.org> Subject: [dpdk-dev] [PATCH v5 15/20] szedata2: localize handling of pci resources X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This changes the driver to handle the PCI resource directly instead of repeatedly going through eth_dev. Signed-off-by: Jan Blunck --- drivers/net/szedata2/rte_eth_szedata2.c | 72 ++++++++++++++++++++------------- drivers/net/szedata2/rte_eth_szedata2.h | 58 +++++++++++--------------- 2 files changed, 67 insertions(+), 63 deletions(-) diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c index 677ba9f..c4f6134 100644 --- a/drivers/net/szedata2/rte_eth_szedata2.c +++ b/drivers/net/szedata2/rte_eth_szedata2.c @@ -91,6 +91,7 @@ struct pmd_internals { uint16_t max_rx_queues; uint16_t max_tx_queues; char sze_dev[PATH_MAX]; + struct rte_mem_resource *pci_rsc; }; static struct ether_addr eth_addr = { @@ -1144,8 +1145,10 @@ eth_link_update(struct rte_eth_dev *dev, struct rte_eth_link link; struct rte_eth_link *link_ptr = &link; struct rte_eth_link *dev_link = &dev->data->dev_link; + struct pmd_internals *internals = (struct pmd_internals *) + dev->data->dev_private; volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_IBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF, volatile struct szedata2_cgmii_ibuf *); switch (cgmii_link_speed(ibuf)) { @@ -1180,11 +1183,13 @@ eth_link_update(struct rte_eth_dev *dev, static int eth_dev_set_link_up(struct rte_eth_dev *dev) { + struct pmd_internals *internals = (struct pmd_internals *) + dev->data->dev_private; volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_IBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF, volatile struct szedata2_cgmii_ibuf *); volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_OBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF, volatile struct szedata2_cgmii_obuf *); cgmii_ibuf_enable(ibuf); @@ -1195,11 +1200,13 @@ eth_dev_set_link_up(struct rte_eth_dev *dev) static int eth_dev_set_link_down(struct rte_eth_dev *dev) { + struct pmd_internals *internals = (struct pmd_internals *) + dev->data->dev_private; volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_IBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF, volatile struct szedata2_cgmii_ibuf *); volatile struct szedata2_cgmii_obuf *obuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_OBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_OBUF_BASE_OFF, volatile struct szedata2_cgmii_obuf *); cgmii_ibuf_disable(ibuf); @@ -1281,8 +1288,10 @@ eth_mac_addr_set(struct rte_eth_dev *dev __rte_unused, static void eth_promiscuous_enable(struct rte_eth_dev *dev) { + struct pmd_internals *internals = (struct pmd_internals *) + dev->data->dev_private; volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_IBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF, volatile struct szedata2_cgmii_ibuf *); cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_PROMISC); } @@ -1290,8 +1299,10 @@ eth_promiscuous_enable(struct rte_eth_dev *dev) static void eth_promiscuous_disable(struct rte_eth_dev *dev) { + struct pmd_internals *internals = (struct pmd_internals *) + dev->data->dev_private; volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_IBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF, volatile struct szedata2_cgmii_ibuf *); cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID); } @@ -1299,8 +1310,10 @@ eth_promiscuous_disable(struct rte_eth_dev *dev) static void eth_allmulticast_enable(struct rte_eth_dev *dev) { + struct pmd_internals *internals = (struct pmd_internals *) + dev->data->dev_private; volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_IBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF, volatile struct szedata2_cgmii_ibuf *); cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ALL_MULTICAST); } @@ -1308,8 +1321,10 @@ eth_allmulticast_enable(struct rte_eth_dev *dev) static void eth_allmulticast_disable(struct rte_eth_dev *dev) { + struct pmd_internals *internals = (struct pmd_internals *) + dev->data->dev_private; volatile struct szedata2_cgmii_ibuf *ibuf = SZEDATA2_PCI_RESOURCE_PTR( - dev, SZEDATA2_CGMII_IBUF_BASE_OFF, + internals->pci_rsc, SZEDATA2_CGMII_IBUF_BASE_OFF, volatile struct szedata2_cgmii_ibuf *); cgmii_ibuf_mac_mode_write(ibuf, SZEDATA2_MAC_CHMODE_ONLY_VALID); } @@ -1349,7 +1364,7 @@ static const struct eth_dev_ops ops = { * -1 on error */ static int -get_szedata2_index(struct rte_eth_dev *dev, uint32_t *index) +get_szedata2_index(const struct rte_pci_addr *pcislot_addr, uint32_t *index) { DIR *dir; struct dirent *entry; @@ -1357,7 +1372,6 @@ get_szedata2_index(struct rte_eth_dev *dev, uint32_t *index) uint32_t tmp_index; FILE *fd; char pcislot_path[PATH_MAX]; - struct rte_pci_addr pcislot_addr = dev->pci_dev->addr; uint32_t domain; uint32_t bus; uint32_t devid; @@ -1392,10 +1406,10 @@ get_szedata2_index(struct rte_eth_dev *dev, uint32_t *index) if (ret != 4) continue; - if (pcislot_addr.domain == domain && - pcislot_addr.bus == bus && - pcislot_addr.devid == devid && - pcislot_addr.function == function) { + if (pcislot_addr->domain == domain && + pcislot_addr->bus == bus && + pcislot_addr->devid == devid && + pcislot_addr->function == function) { *index = tmp_index; closedir(dir); return 0; @@ -1415,9 +1429,10 @@ rte_szedata2_eth_dev_init(struct rte_eth_dev *dev) struct szedata *szedata_temp; int ret; uint32_t szedata2_index; - struct rte_pci_addr *pci_addr = &dev->pci_dev->addr; + struct rte_pci_device *pci_dev = dev->pci_dev; + struct rte_pci_addr *pci_addr = &pci_dev->addr; struct rte_mem_resource *pci_rsc = - &dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER]; + &pci_dev->mem_resource[PCI_RESOURCE_NUMBER]; char rsc_filename[PATH_MAX]; void *pci_resource_ptr = NULL; int fd; @@ -1427,7 +1442,7 @@ rte_szedata2_eth_dev_init(struct rte_eth_dev *dev) pci_addr->function); /* Get index of szedata2 device file and create path to device file */ - ret = get_szedata2_index(dev, &szedata2_index); + ret = get_szedata2_index(pci_addr, &szedata2_index); if (ret != 0) { RTE_LOG(ERR, PMD, "Failed to get szedata2 device index!\n"); return -ENODEV; @@ -1471,10 +1486,10 @@ rte_szedata2_eth_dev_init(struct rte_eth_dev *dev) /* Set function callbacks for Ethernet API */ dev->dev_ops = &ops; - rte_eth_copy_pci_info(dev, dev->pci_dev); + rte_eth_copy_pci_info(dev, pci_dev); /* mmap pci resource0 file to rte_mem_resource structure */ - if (dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].phys_addr == + if (pci_dev->mem_resource[PCI_RESOURCE_NUMBER].phys_addr == 0) { RTE_LOG(ERR, PMD, "Missing resource%u file\n", PCI_RESOURCE_NUMBER); @@ -1491,7 +1506,7 @@ rte_szedata2_eth_dev_init(struct rte_eth_dev *dev) } pci_resource_ptr = mmap(0, - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len, + pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); close(fd); if (pci_resource_ptr == NULL) { @@ -1499,8 +1514,8 @@ rte_szedata2_eth_dev_init(struct rte_eth_dev *dev) rsc_filename, fd); return -EINVAL; } - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr = - pci_resource_ptr; + pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr = pci_resource_ptr; + internals->pci_rsc = pci_rsc; RTE_LOG(DEBUG, PMD, "resource%u phys_addr = 0x%llx len = %llu " "virt addr = %llx\n", PCI_RESOURCE_NUMBER, @@ -1516,8 +1531,8 @@ rte_szedata2_eth_dev_init(struct rte_eth_dev *dev) RTE_CACHE_LINE_SIZE); if (data->mac_addrs == NULL) { RTE_LOG(ERR, PMD, "Could not alloc space for MAC address!\n"); - munmap(dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr, - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len); + munmap(pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr, + pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len); return -EINVAL; } @@ -1537,12 +1552,13 @@ rte_szedata2_eth_dev_init(struct rte_eth_dev *dev) static int rte_szedata2_eth_dev_uninit(struct rte_eth_dev *dev) { - struct rte_pci_addr *pci_addr = &dev->pci_dev->addr; + struct rte_pci_device *pci_dev = dev->pci_dev; + struct rte_pci_addr *pci_addr = &pci_dev->addr; rte_free(dev->data->mac_addrs); dev->data->mac_addrs = NULL; - munmap(dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr, - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len); + munmap(pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr, + pci_dev->mem_resource[PCI_RESOURCE_NUMBER].len); RTE_LOG(INFO, PMD, "szedata2 device (" PCI_PRI_FMT ") successfully uninitialized\n", diff --git a/drivers/net/szedata2/rte_eth_szedata2.h b/drivers/net/szedata2/rte_eth_szedata2.h index 522cf47..3b90924 100644 --- a/drivers/net/szedata2/rte_eth_szedata2.h +++ b/drivers/net/szedata2/rte_eth_szedata2.h @@ -117,94 +117,82 @@ struct szedata { * @return Byte from PCI resource at offset "offset". */ static inline uint8_t -pci_resource_read8(struct rte_eth_dev *dev, uint32_t offset) +pci_resource_read8(struct rte_mem_resource *rsc, uint32_t offset) { - return *((uint8_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset)); + return *((uint8_t *)((uint8_t *)rsc->addr + offset)); } /* * @return Two bytes from PCI resource starting at offset "offset". */ static inline uint16_t -pci_resource_read16(struct rte_eth_dev *dev, uint32_t offset) +pci_resource_read16(struct rte_mem_resource *rsc, uint32_t offset) { - return rte_le_to_cpu_16(*((uint16_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset))); + return rte_le_to_cpu_16(*((uint16_t *)((uint8_t *)rsc->addr + + offset))); } /* * @return Four bytes from PCI resource starting at offset "offset". */ static inline uint32_t -pci_resource_read32(struct rte_eth_dev *dev, uint32_t offset) +pci_resource_read32(struct rte_mem_resource *rsc, uint32_t offset) { - return rte_le_to_cpu_32(*((uint32_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset))); + return rte_le_to_cpu_32(*((uint32_t *)((uint8_t *)rsc->addr + + offset))); } /* * @return Eight bytes from PCI resource starting at offset "offset". */ static inline uint64_t -pci_resource_read64(struct rte_eth_dev *dev, uint32_t offset) +pci_resource_read64(struct rte_mem_resource *rsc, uint32_t offset) { - return rte_le_to_cpu_64(*((uint64_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset))); + return rte_le_to_cpu_64(*((uint64_t *)((uint8_t *)rsc->addr + + offset))); } /* * Write one byte to PCI resource address space at offset "offset". */ static inline void -pci_resource_write8(struct rte_eth_dev *dev, uint32_t offset, uint8_t val) +pci_resource_write8(struct rte_mem_resource *rsc, uint32_t offset, uint8_t val) { - *((uint8_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset)) = val; + *((uint8_t *)((uint8_t *)rsc->addr + offset)) = val; } /* * Write two bytes to PCI resource address space at offset "offset". */ static inline void -pci_resource_write16(struct rte_eth_dev *dev, uint32_t offset, uint16_t val) +pci_resource_write16(struct rte_mem_resource *rsc, uint32_t offset, + uint16_t val) { - *((uint16_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset)) = rte_cpu_to_le_16(val); + *((uint16_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_16(val); } /* * Write four bytes to PCI resource address space at offset "offset". */ static inline void -pci_resource_write32(struct rte_eth_dev *dev, uint32_t offset, uint32_t val) +pci_resource_write32(struct rte_mem_resource *rsc, uint32_t offset, + uint32_t val) { - *((uint32_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset)) = rte_cpu_to_le_32(val); + *((uint32_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_32(val); } /* * Write eight bytes to PCI resource address space at offset "offset". */ static inline void -pci_resource_write64(struct rte_eth_dev *dev, uint32_t offset, uint64_t val) +pci_resource_write64(struct rte_mem_resource *rsc, uint32_t offset, + uint64_t val) { - *((uint64_t *)((uint8_t *) - dev->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr + - offset)) = rte_cpu_to_le_64(val); + *((uint64_t *)((uint8_t *)rsc->addr + offset)) = rte_cpu_to_le_64(val); } #define SZEDATA2_PCI_RESOURCE_PTR(dev, offset, type) \ - ((type)((uint8_t *) \ - ((dev)->pci_dev->mem_resource[PCI_RESOURCE_NUMBER].addr) \ - + (offset))) + ((type)((uint8_t *)(rsc)->addr) + (offset))) enum szedata2_link_speed { SZEDATA2_LINK_SPEED_DEFAULT = 0,