From patchwork Sat Dec 10 11:24:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingjing Wu X-Patchwork-Id: 17853 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id CEFA8FA7E; Sat, 10 Dec 2016 12:27:22 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id CA85C5679 for ; Sat, 10 Dec 2016 12:26:40 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP; 10 Dec 2016 03:26:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.33,327,1477983600"; d="scan'208"; a="1070414011" Received: from dpdk2.sh.intel.com ([10.239.128.246]) by orsmga001.jf.intel.com with ESMTP; 10 Dec 2016 03:26:39 -0800 From: Jingjing Wu To: dev@dpdk.org Cc: jingjing.wu@intel.com, helin.zhang@intel.com Date: Sat, 10 Dec 2016 19:24:45 +0800 Message-Id: <1481369093-102492-24-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 2.4.11 In-Reply-To: <1481369093-102492-1-git-send-email-jingjing.wu@intel.com> References: <1481294364-83505-1-git-send-email-jingjing.wu@intel.com> <1481369093-102492-1-git-send-email-jingjing.wu@intel.com> Subject: [dpdk-dev] [PATCH v3 23/31] net/i40e/base: change shift values to hex X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Signed-off-by: Jingjing Wu --- drivers/net/i40e/base/i40e_type.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 99e080e..3784c8f 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -365,9 +365,9 @@ enum i40e_acpi_programming_method { I40E_ACPI_PROGRAMMING_METHOD_AQC_FPK = 1 }; -#define I40E_WOL_SUPPORT_MASK 1 -#define I40E_ACPI_PROGRAMMING_METHOD_MASK (1 << 1) -#define I40E_PROXY_SUPPORT_MASK (1 << 2) +#define I40E_WOL_SUPPORT_MASK 0x1 +#define I40E_ACPI_PROGRAMMING_METHOD_MASK 0x2 +#define I40E_PROXY_SUPPORT_MASK 0x4 #endif /* Capabilities of a PF or a VF or the whole device */