From patchwork Thu Nov 24 09:54:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier Matz X-Patchwork-Id: 17238 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id F0BB65922; Thu, 24 Nov 2016 11:00:40 +0100 (CET) Received: from proxy.6wind.com (host.76.145.23.62.rev.coltfrance.com [62.23.145.76]) by dpdk.org (Postfix) with ESMTP id D79D04A59 for ; Thu, 24 Nov 2016 10:59:38 +0100 (CET) Received: from glumotte.dev.6wind.com (unknown [10.16.0.195]) by proxy.6wind.com (Postfix) with ESMTP id 804D92646D; Thu, 24 Nov 2016 10:59:34 +0100 (CET) From: Olivier Matz To: dev@dpdk.org Cc: thomas.monjalon@6wind.com, konstantin.ananyev@intel.com, wenzhuo.lu@intel.com, helin.zhang@intel.com Date: Thu, 24 Nov 2016 10:54:19 +0100 Message-Id: <1479981261-19512-8-git-send-email-olivier.matz@6wind.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1479981261-19512-1-git-send-email-olivier.matz@6wind.com> References: <1479981261-19512-1-git-send-email-olivier.matz@6wind.com> Subject: [dpdk-dev] [RFC 7/9] net/igb: add handler for tx queue descriptor count X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Like for TX, use a binary search algorithm to get the number of used Tx descriptors. PR=52423 Signed-off-by: Olivier Matz Acked-by: Ivan Boule --- drivers/net/e1000/e1000_ethdev.h | 5 +++- drivers/net/e1000/igb_ethdev.c | 1 + drivers/net/e1000/igb_rxtx.c | 51 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 1 deletion(-) diff --git a/drivers/net/e1000/e1000_ethdev.h b/drivers/net/e1000/e1000_ethdev.h index 6c25c8d..ad9ddaf 100644 --- a/drivers/net/e1000/e1000_ethdev.h +++ b/drivers/net/e1000/e1000_ethdev.h @@ -300,7 +300,10 @@ int eth_igb_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, struct rte_mempool *mb_pool); uint32_t eth_igb_rx_queue_count(struct rte_eth_dev *dev, - uint16_t rx_queue_id); + uint16_t rx_queue_id); + +uint32_t eth_igb_tx_queue_count(struct rte_eth_dev *dev, + uint16_t tx_queue_id); int eth_igb_rx_descriptor_done(void *rx_queue, uint16_t offset); diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 08f2a68..a54d374 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -399,6 +399,7 @@ static const struct eth_dev_ops eth_igb_ops = { .rx_queue_intr_disable = eth_igb_rx_queue_intr_disable, .rx_queue_release = eth_igb_rx_queue_release, .rx_queue_count = eth_igb_rx_queue_count, + .tx_queue_count = eth_igb_tx_queue_count, .rx_descriptor_done = eth_igb_rx_descriptor_done, .tx_queue_setup = eth_igb_tx_queue_setup, .tx_queue_release = eth_igb_tx_queue_release, diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c index 6b0111f..2ff2417 100644 --- a/drivers/net/e1000/igb_rxtx.c +++ b/drivers/net/e1000/igb_rxtx.c @@ -1554,6 +1554,57 @@ eth_igb_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) return offset; } +uint32_t +eth_igb_tx_queue_count(struct rte_eth_dev *dev, uint16_t tx_queue_id) +{ + volatile uint32_t *status; + struct igb_tx_queue *txq; + int32_t offset, interval, idx, resolution; + + txq = dev->data->tx_queues[tx_queue_id]; + + /* check if ring empty */ + idx = txq->tx_tail - 1; + if (idx < 0) + idx += txq->nb_tx_desc; + status = &txq->tx_ring[idx].wb.status; + if (*status & rte_cpu_to_le_32(E1000_TXD_STAT_DD)) + return 0; + + /* check if ring full */ + idx = txq->tx_tail + 1; + if (idx >= txq->nb_tx_desc) + idx -= txq->nb_tx_desc; + status = &txq->tx_ring[idx].wb.status; + if (!(*status & rte_cpu_to_le_32(E1000_TXD_STAT_DD))) + return txq->nb_tx_desc; + + /* decrease the precision if ring is large */ + if (txq->nb_tx_desc <= 256) + resolution = 4; + else + resolution = 16; + + /* use a binary search */ + interval = txq->nb_tx_desc >> 1; + offset = interval; + + do { + interval >>= 1; + idx = txq->tx_tail + offset; + if (idx >= txq->nb_tx_desc) + idx -= txq->nb_tx_desc; + + status = &txq->tx_ring[idx].wb.status; + if (*status & rte_cpu_to_le_32(E1000_TXD_STAT_DD)) + offset += interval; + else + offset -= interval; + } while (interval >= resolution); + + return txq->nb_tx_desc - offset; +} + int eth_igb_rx_descriptor_done(void *rx_queue, uint16_t offset) {