From patchwork Sun Nov 6 16:58:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenzhuo Lu X-Patchwork-Id: 16960 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 64E6F11C5; Mon, 7 Nov 2016 02:07:54 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id D4F0210A7 for ; Mon, 7 Nov 2016 02:07:52 +0100 (CET) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP; 06 Nov 2016 17:07:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,604,1473145200"; d="scan'208";a="28189797" Received: from dpdk26.sh.intel.com ([10.239.128.228]) by fmsmga005.fm.intel.com with ESMTP; 06 Nov 2016 17:07:51 -0800 From: Wenzhuo Lu To: dev@dpdk.org Cc: Wenzhuo Lu Date: Sun, 6 Nov 2016 11:58:47 -0500 Message-Id: <1478451527-104571-1-git-send-email-wenzhuo.lu@intel.com> X-Mailer: git-send-email 1.9.3 Subject: [dpdk-dev] [PATCH] ixgbe: fix wrong RX DMA registers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Some VF RX DMA registers are using PF's addresses by mistake. Although some of them are sharing the same addresses, we should use the right ones. Fixes: 0198848a47f5 ("ixgbe: add access to specific device info") Signed-off-by: Wenzhuo Lu --- drivers/net/ixgbe/ixgbe_regs.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_regs.h b/drivers/net/ixgbe/ixgbe_regs.h index ca4725d..773e169 100644 --- a/drivers/net/ixgbe/ixgbe_regs.h +++ b/drivers/net/ixgbe/ixgbe_regs.h @@ -145,17 +145,17 @@ static const struct reg_info ixgbe_regs_rxdma[] = { }; static const struct reg_info ixgbevf_regs_rxdma[] = { - {IXGBE_RDBAL(0), 8, 0x40, "IXGBE_RDBAL"}, - {IXGBE_RDBAH(0), 8, 0x40, "IXGBE_RDBAH"}, - {IXGBE_RDLEN(0), 8, 0x40, "IXGBE_RDLEN"}, - {IXGBE_RDH(0), 8, 0x40, "IXGBE_RDH"}, - {IXGBE_RDT(0), 8, 0x40, "IXGBE_RDT"}, - {IXGBE_RXDCTL(0), 8, 0x40, "IXGBE_RXDCTL"}, - {IXGBE_SRRCTL(0), 8, 0x40, "IXGBE_SRRCTL"}, + {IXGBE_VFRDBAL(0), 8, 0x40, "IXGBE_VFRDBAL"}, + {IXGBE_VFRDBAH(0), 8, 0x40, "IXGBE_VFRDBAH"}, + {IXGBE_VFRDLEN(0), 8, 0x40, "IXGBE_VFRDLEN"}, + {IXGBE_VFRDH(0), 8, 0x40, "IXGBE_VFRDH"}, + {IXGBE_VFRDT(0), 8, 0x40, "IXGBE_VFRDT"}, + {IXGBE_VFRXDCTL(0), 8, 0x40, "IXGBE_VFRXDCTL"}, + {IXGBE_VFSRRCTL(0), 8, 0x40, "IXGBE_VFSRRCTL"}, {IXGBE_VFPSRTYPE, 1, 1, "IXGBE_VFPSRTYPE"}, {IXGBE_VFRSCCTL(0), 8, 0x40, "IXGBE_VFRSCCTL"}, - {IXGBE_PVFDCA_RXCTRL(0), 8, 0x40, "IXGBE_PVFDCA_RXCTRL"}, - {IXGBE_PVFDCA_TXCTRL(0), 8, 0x40, "IXGBE_PVFDCA_TXCTRL"}, + {IXGBE_VFDCA_RXCTRL(0), 8, 0x40, "IXGBE_VFDCA_RXCTRL"}, + {IXGBE_VFDCA_TXCTRL(0), 8, 0x40, "IXGBE_VFDCA_TXCTRL"}, {0, 0, 0, ""} };