From patchwork Sat Oct 15 20:08:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rasesh Mody X-Patchwork-Id: 16644 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 20F978E79; Sat, 15 Oct 2016 22:10:18 +0200 (CEST) Received: from mx0b-0016ce01.pphosted.com (mx0a-0016ce01.pphosted.com [67.231.148.157]) by dpdk.org (Postfix) with ESMTP id 748248E73 for ; Sat, 15 Oct 2016 22:10:15 +0200 (CEST) Received: from pps.filterd (m0095336.ppops.net [127.0.0.1]) by mx0a-0016ce01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u9FK94Pa015427; Sat, 15 Oct 2016 13:10:14 -0700 Received: from avcashub1.qlogic.com ([198.186.0.115]) by mx0a-0016ce01.pphosted.com with ESMTP id 263jj4gft0-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Sat, 15 Oct 2016 13:10:14 -0700 Received: from avluser05.qlc.com (10.1.113.115) by avcashub1.qlogic.org (10.1.4.190) with Microsoft SMTP Server (TLS) id 14.3.235.1; Sat, 15 Oct 2016 13:10:13 -0700 Received: (from rmody@localhost) by avluser05.qlc.com (8.14.4/8.14.4/Submit) id u9FKADXR022053; Sat, 15 Oct 2016 13:10:13 -0700 X-Authentication-Warning: avluser05.qlc.com: rmody set sender to rasesh.mody@qlogic.com using -f From: Rasesh Mody To: , , CC: , , Harish Patil Date: Sat, 15 Oct 2016 13:08:02 -0700 Message-ID: <1476562089-21823-26-git-send-email-rasesh.mody@qlogic.com> X-Mailer: git-send-email 1.7.10.3 In-Reply-To: <1476562089-21823-1-git-send-email-rasesh.mody@qlogic.com> References: <1476562089-21823-1-git-send-email-rasesh.mody@qlogic.com> MIME-Version: 1.0 disclaimer: bypass X-Proofpoint-Virus-Version: vendor=nai engine=5800 definitions=8319 signatures=670719 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1610150355 Subject: [dpdk-dev] [PATCH v3 25/32] qede/base: add support to initiate PF FLR X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Harish Patil Add support to send PF FLR request to the management firmware to bringup the device in clean slate. This cleanup is necessary in some corner cases where the device would be left in a bad state from its previous operations. The driver will send PF FLR request before slowpath initialization. Signed-off-by: Harish Patil --- doc/guides/nics/qede.rst | 1 - drivers/net/qede/base/ecore_dev.c | 15 +++++++++++---- drivers/net/qede/base/ecore_mcp.c | 9 +++++++++ drivers/net/qede/base/ecore_mcp.h | 11 +++++++++++ 4 files changed, 31 insertions(+), 5 deletions(-) diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst index 2a585e7..50e6f87 100644 --- a/doc/guides/nics/qede.rst +++ b/doc/guides/nics/qede.rst @@ -65,7 +65,6 @@ Non-supported Features - SR-IOV PF - Tunneling offloads -- Reload of the PMD after a non-graceful termination Supported QLogic Adapters ------------------------- diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c index b530173..6060f9e 100644 --- a/drivers/net/qede/base/ecore_dev.c +++ b/drivers/net/qede/base/ecore_dev.c @@ -2952,13 +2952,14 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview, void OSAL_IOMEM *p_doorbells, struct ecore_hw_prepare_params *p_params) { + struct ecore_dev *p_dev = p_hwfn->p_dev; enum _ecore_status_t rc = ECORE_SUCCESS; /* Split PCI bars evenly between hwfns */ p_hwfn->regview = p_regview; p_hwfn->doorbells = p_doorbells; - if (IS_VF(p_hwfn->p_dev)) + if (IS_VF(p_dev)) return ecore_vf_hw_prepare(p_hwfn); /* Validate that chip access is feasible */ @@ -2982,7 +2983,7 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview, /* First hwfn learns basic information, e.g., number of hwfns */ if (!p_hwfn->my_id) { - rc = ecore_get_dev_info(p_hwfn->p_dev); + rc = ecore_get_dev_info(p_dev); if (rc != ECORE_SUCCESS) goto err1; } @@ -2996,6 +2997,12 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview, goto err1; } + if (p_hwfn == ECORE_LEADING_HWFN(p_dev) && !p_dev->recov_in_prog) { + rc = ecore_mcp_initiate_pf_flr(p_hwfn, p_hwfn->p_main_ptt); + if (rc != ECORE_SUCCESS) + DP_NOTICE(p_hwfn, false, "Failed to initiate PF FLR\n"); + } + /* Read the device configuration information from the HW and SHMEM */ rc = ecore_get_hw_info(p_hwfn, p_hwfn->p_main_ptt, p_params->personality, p_params->drv_resc_alloc); @@ -3011,7 +3018,7 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview, goto err2; } #ifndef ASIC_ONLY - if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) { + if (CHIP_REV_IS_FPGA(p_dev)) { DP_NOTICE(p_hwfn, false, "FPGA: workaround; Prevent DMAE parities\n"); ecore_wr(p_hwfn, p_hwfn->p_main_ptt, PCIE_REG_PRTY_MASK, 7); @@ -3026,7 +3033,7 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void OSAL_IOMEM *p_regview, return rc; err2: if (IS_LEAD_HWFN(p_hwfn)) - ecore_iov_free_hw_info(p_hwfn->p_dev); + ecore_iov_free_hw_info(p_dev); ecore_mcp_free(p_hwfn); err1: ecore_hw_hwfn_free(p_hwfn); diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c index 500368e..2ff9715 100644 --- a/drivers/net/qede/base/ecore_mcp.c +++ b/drivers/net/qede/base/ecore_mcp.c @@ -2442,3 +2442,12 @@ enum _ecore_status_t ecore_mcp_get_resc_info(struct ecore_hwfn *p_hwfn, return ECORE_SUCCESS; } + +enum _ecore_status_t ecore_mcp_initiate_pf_flr(struct ecore_hwfn *p_hwfn, + struct ecore_ptt *p_ptt) +{ + u32 mcp_resp, mcp_param; + + return ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_INITIATE_PF_FLR, + 0, &mcp_resp, &mcp_param); +} diff --git a/drivers/net/qede/base/ecore_mcp.h b/drivers/net/qede/base/ecore_mcp.h index d3103ff..831890c 100644 --- a/drivers/net/qede/base/ecore_mcp.h +++ b/drivers/net/qede/base/ecore_mcp.h @@ -353,4 +353,15 @@ enum _ecore_status_t ecore_mcp_get_resc_info(struct ecore_hwfn *p_hwfn, struct resource_info *p_resc_info, u32 *p_mcp_resp, u32 *p_mcp_param); +/** + * @brief - Initiates PF FLR + * + * @param p_hwfn + * @param p_ptt + * + * @param return ECORE_SUCCESS upon success. + */ +enum _ecore_status_t ecore_mcp_initiate_pf_flr(struct ecore_hwfn *p_hwfn, + struct ecore_ptt *p_ptt); + #endif /* __ECORE_MCP_H__ */