From patchwork Mon Jun 13 08:02:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhe Tao X-Patchwork-Id: 13501 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 9C0475320; Mon, 13 Jun 2016 10:03:06 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 54B0147D1 for ; Mon, 13 Jun 2016 10:03:04 +0200 (CEST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP; 13 Jun 2016 01:03:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,466,1459839600"; d="scan'208";a="718142795" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by FMSMGA003.fm.intel.com with ESMTP; 13 Jun 2016 01:03:02 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id u5D831xJ012976; Mon, 13 Jun 2016 16:03:01 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id u5D82vRn002887; Mon, 13 Jun 2016 16:02:59 +0800 Received: (from zhetao@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id u5D82v1t002883; Mon, 13 Jun 2016 16:02:57 +0800 From: Zhe Tao To: dev@dpdk.org Cc: zhe.tao@intel.com, jingjing.wu@intel.com Date: Mon, 13 Jun 2016 16:02:37 +0800 Message-Id: <1465804960-2846-2-git-send-email-zhe.tao@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1465804960-2846-1-git-send-email-zhe.tao@intel.com> References: <1465800350-2024-1-git-send-email-zhe.tao@intel.com> <1465804960-2846-1-git-send-email-zhe.tao@intel.com> Subject: [dpdk-dev] [PATCH v10 1/3] i40e: support floating VEB config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the new floating related argument option in the devarg. Using this parameter, all the samples can decide whether to use legacy VEB/VEPA or floating VEB. To enable this feature, the user should pass a devargs parameter to the EAL like "-w 84:00.0,enable_floatingVEB=1", and the application will make sure the PMD will use the floating VEB feature for all the VFs created by this PF device. All the VEB/VEPA concepts are not specific for FVL, they are defined in the 802.1Qbg spec. But for floating VEB, it has two major difference. 1. doesn't has a up link connection which means the traffic cannot go to ouside world. 2. doesn't need to connect to the phsical port which means when the physical link is down the floating VEB can still works fine. Signed-off-by: Zhe Tao --- drivers/net/i40e/i40e_ethdev.c | 44 ++++++++++++++++++++++++++++++++++++++++++ drivers/net/i40e/i40e_ethdev.h | 6 ++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 24777d5..8c4ae1c 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -750,6 +750,44 @@ i40e_add_tx_flow_control_drop_filter(struct i40e_pf *pf) " frames from VSIs."); } +static int i40e_check_floating_handler(__rte_unused const char *key, + const char *value, + __rte_unused void *opaque) +{ + if (strcmp(value, "1")) + return -1; + + return 0; +} + +static int +i40e_check_floating(struct rte_devargs *devargs) +{ + struct rte_kvargs *kvlist; + const char *floating_key = "enable_floatingVEB"; + + if (devargs == NULL) + return 0; + + kvlist = rte_kvargs_parse(devargs->args, NULL); + if (kvlist == NULL) + return 0; + + if (!rte_kvargs_count(kvlist, floating_key)) { + rte_kvargs_free(kvlist); + return 0; + } + /* Floating is enabled when there's key-value: enable_floatingVEB=1 */ + if (rte_kvargs_process(kvlist, floating_key, + i40e_check_floating_handler, NULL) < 0) { + rte_kvargs_free(kvlist); + return 0; + } + rte_kvargs_free(kvlist); + + return 1; +} + static int eth_i40e_dev_init(struct rte_eth_dev *dev) { @@ -843,6 +881,12 @@ eth_i40e_dev_init(struct rte_eth_dev *dev) ((hw->nvm.version >> 4) & 0xff), (hw->nvm.version & 0xf), hw->nvm.eetrack); + /* Need the special FW version support floating VEB */ + if (hw->aq.fw_maj_ver >= FLOATING_FW_MAJ) { + pf->floating = i40e_check_floating(pci_dev->devargs); + } else { + pf->floating = false; + } /* Clear PXE mode */ i40e_clear_pxe_mode(hw); diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index cfd2399..8297c5f 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -36,6 +36,7 @@ #include #include +#include #define I40E_VLAN_TAG_SIZE 4 @@ -171,6 +172,10 @@ enum i40e_flxpld_layer_idx { #define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */ #define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */ +/* Special FW support this floating VEB feature */ +#define FLOATING_FW_MAJ 5 +#define FLOATING_FW_MIN 0 + struct i40e_adapter; /** @@ -450,6 +455,7 @@ struct i40e_pf { struct i40e_fc_conf fc_conf; /* Flow control conf */ struct i40e_mirror_rule_list mirror_list; uint16_t nb_mirror_rule; /* The number of mirror rules */ + uint16_t floating; /* The flag to use the floating VEB */ }; enum pending_msg {