diff mbox

[dpdk-dev,v2] ip_pipeline: fix false cacheline sharing among threads

Message ID 1465735367-187704-1-git-send-email-jasvinder.singh@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers

Commit Message

Jasvinder Singh June 12, 2016, 12:42 p.m. UTC 
  In ip_pipeline app, the structure app_thread_data needs to be aligned to
the cache line boundary as threads on different cpu cores are accessing
fields of the app->thread_data and having this structure not aligned on
cacheline boundary leads to false cacheline sharing.

Fixes: 7f64b9c004aa ("examples/ip_pipeline: rework config file syntax")

Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---
v2
- fix checkpatch error

 examples/ip_pipeline/app.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Thomas Monjalon June 14, 2016, 7:13 p.m. UTC | #1 
2016-06-12 13:42, Jasvinder Singh:
> In ip_pipeline app, the structure app_thread_data needs to be aligned to
> the cache line boundary as threads on different cpu cores are accessing
> fields of the app->thread_data and having this structure not aligned on
> cacheline boundary leads to false cacheline sharing.
> 
> Fixes: 7f64b9c004aa ("examples/ip_pipeline: rework config file syntax")
> 
> Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
> Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>

Applied, thanks
diff mbox

Patch

diff --git a/examples/ip_pipeline/app.h b/examples/ip_pipeline/app.h
index 848244a..7611341 100644
--- a/examples/ip_pipeline/app.h
+++ b/examples/ip_pipeline/app.h
@@ -300,7 +300,7 @@  struct app_thread_data {
 	uint64_t headroom_time;
 	uint64_t headroom_cycles;
 	double headroom_ratio;
-};
+} __rte_cache_aligned;
 
 #ifndef APP_MAX_LINKS
 #define APP_MAX_LINKS                            16