From patchwork Fri Mar 18 12:54:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?N=C3=A9lio_Laranjeiro?= X-Patchwork-Id: 11589 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id A89982C68; Fri, 18 Mar 2016 13:55:11 +0100 (CET) Received: from mail-wm0-f46.google.com (mail-wm0-f46.google.com [74.125.82.46]) by dpdk.org (Postfix) with ESMTP id 205EB2C46 for ; Fri, 18 Mar 2016 13:55:11 +0100 (CET) Received: by mail-wm0-f46.google.com with SMTP id p65so36020508wmp.0 for ; Fri, 18 Mar 2016 05:55:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=KDXch5YO9X2SeUKJTsvUEseeqn1mpVG0xTbVT1AgS2Q=; b=BikrYuzz2jMG4KYZyDeBvkidcp4wsA9ScWiRzKnTLAR8VPtNxvBPG8MI8so4ihb/9c yIRJXzSUIUoVsdgNB4iqjncKo8EoYRyO+6AtPofp1/AV3cBl4kASnrq0XNw+6yNE8PLr MdcnwWegLfhtL89XpeXGUAGF0rMRJ/nk8VCqm8MKJL8MKOznlpRpb++DB3KcTMBmjVT5 ocm/cQQd9WxhWEo+nodb+mUHXEx1J8W1ZVRaNuRKrGTzxskc80hN4RzATe/tivE+ZPT+ orCqJ6vYpm/4tNsziwLjATuoAcytTG2BG87a4M8IraYdHfuGKIAF+UmQsnJnyqdpneoD VZCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=KDXch5YO9X2SeUKJTsvUEseeqn1mpVG0xTbVT1AgS2Q=; b=nKPkX7Kyzej+5a26rsNRAKYD4pB+MKhax+KZ/fuXtSBTtpFNX5MmIKDpXauKftujc3 oPIWjTfcnEYst7KeOiH2zrQkhErEvAVWrGTYj8XT+XmrSgiqXT7MVdhECo4AFLswWSxO wvQjj0Ac0G8flUTx6eanNhZiIp3I/4ZDCv9RPIWVXD2agFyEBa5J0TWEC05xXojfoX30 KF3ESZ7mlkNbsLmnO1vLOJR9MlaMdwD3lvwRUmKeZhgZnwk80gR3CzfJKxLlrCD9a+xU IAjedvBc2HhQFIpfwcfeUeYKujJeKqk0Fj4BFZ0ml2qfbyL29Q7GiMQ1FgEMTMJQCwkJ fbhQ== X-Gm-Message-State: AD7BkJJsTrsnk8KSt6A1MKtlDo5+5PCHQ982ZownN1wF2Kfd5KNr8pa3geayabFP23rsipAK X-Received: by 10.28.150.19 with SMTP id y19mr43734198wmd.56.1458305710999; Fri, 18 Mar 2016 05:55:10 -0700 (PDT) Received: from ping.vm.6wind.com (guy78-3-82-239-227-177.fbx.proxad.net. [82.239.227.177]) by smtp.gmail.com with ESMTPSA id r8sm12151884wjz.34.2016.03.18.05.55.09 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 18 Mar 2016 05:55:10 -0700 (PDT) From: Nelio Laranjeiro To: dev@dpdk.org Cc: adrien.mazarguil@6wind.com Date: Fri, 18 Mar 2016 13:54:42 +0100 Message-Id: <1458305683-31552-1-git-send-email-nelio.laranjeiro@6wind.com> X-Mailer: git-send-email 2.1.4 Subject: [dpdk-dev] [PATCH 1/2] mlx5: fix overwritten RSS configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" RSS configuration provided by the application should not be used as storage by the PMD. Fixes: 2f97422e7759 ("mlx5: support RSS hash update and get") Signed-off-by: Nelio Laranjeiro Acked-by: Adrien Mazarguil --- drivers/net/mlx5/mlx5.h | 1 + drivers/net/mlx5/mlx5_ethdev.c | 1 + drivers/net/mlx5/mlx5_rss.c | 7 ++----- drivers/net/mlx5/mlx5_rxq.c | 2 +- 4 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index d012f50..d6c08bb 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -122,6 +122,7 @@ struct priv { unsigned int hash_rxqs_n; /* Hash RX QPs array size. */ /* RSS configuration array indexed by hash RX queue type. */ struct rte_eth_rss_conf *(*rss_conf)[]; + uint64_t rss_hf; /* RSS DPDK bit field of active RSS. */ struct rte_intr_handle intr_handle; /* Interrupt handler. */ unsigned int (*reta_idx)[]; /* RETA index table. */ unsigned int reta_idx_n; /* RETA index size. */ diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c index 66115d2..aa67623 100644 --- a/drivers/net/mlx5/mlx5_ethdev.c +++ b/drivers/net/mlx5/mlx5_ethdev.c @@ -447,6 +447,7 @@ dev_configure(struct rte_eth_dev *dev) unsigned int j; unsigned int reta_idx_n; + priv->rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; priv->rxqs = (void *)dev->data->rx_queues; priv->txqs = (void *)dev->data->tx_queues; if (txqs_n != priv->txqs_n) { diff --git a/drivers/net/mlx5/mlx5_rss.c b/drivers/net/mlx5/mlx5_rss.c index 7eb688a..e73cd9d 100644 --- a/drivers/net/mlx5/mlx5_rss.c +++ b/drivers/net/mlx5/mlx5_rss.c @@ -162,11 +162,8 @@ mlx5_rss_hash_update(struct rte_eth_dev *dev, rss_hash_default_key_len, ETH_RSS_PROTO_MASK); - /* Store the configuration set into port configure. - * This will enable/disable hash RX queues associated to the protocols - * enabled/disabled by this update. */ - priv->dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf = - rss_conf->rss_hf; + /* Store protocols for which RSS is enabled. */ + priv->rss_hf = rss_conf->rss_hf; priv_unlock(priv); assert(err >= 0); return -err; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index c8af77f..cbb017b 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -312,7 +312,7 @@ priv_make_ind_table_init(struct priv *priv, /* Mandatory to receive frames not handled by normal hash RX queues. */ unsigned int hash_types_sup = 1 << HASH_RXQ_ETH; - rss_hf = priv->dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; + rss_hf = priv->rss_hf; /* Process other protocols only if more than one queue. */ if (priv->rxqs_n > 1) for (i = 0; (i != hash_rxq_init_n); ++i)