From patchwork Tue Mar 1 00:45:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Sune X-Patchwork-Id: 10917 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 92AE193FA; Tue, 1 Mar 2016 01:46:07 +0100 (CET) Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by dpdk.org (Postfix) with ESMTP id B70667EB0 for ; Tue, 1 Mar 2016 01:46:06 +0100 (CET) Received: by mail-wm0-f68.google.com with SMTP id p65so1517944wmp.1 for ; Mon, 29 Feb 2016 16:46:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Wmp40VplIh23wcXSUWcWb/9Ooweqer5Sg3sxLDxG3f8=; b=eOCR+0IaBpgsGriv9Zes6IvH6GjO4bnlAKkZebDBihbbSL/YHTARACFC/kgk28Jx1s xbA3/EkKoTQ2zHb7xxGjaxGJTfX5h6RWJCkosVn6VrKL3YkxbTP05Uic3kvvwWwr9nJs oVIGo2jwyu154A+zVM8sq7EbVOfQXHKz1OWU1da3j7jw+vU2BjxXBWbUzsDHf7onaFC0 8182+iJQIuO7TSKYDIdgaYeUsA+MBzF23EKKAounRpFqZ6efQ9qGSThiyfiV9fm9n0+Y maiDTAYgr1Vs9OSbynwLSZvXYa+1Yd9YDHlAgFd6684Idbu5loNLgbrdt6/sMIo98L14 Lasw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Wmp40VplIh23wcXSUWcWb/9Ooweqer5Sg3sxLDxG3f8=; b=TmftdlTWBAGhWtGpx9gFy/zJiRRkb8ffGji80cBgZhln1P/G/UJDBtJfr6kfsuBejN Bs+lpxZ7RBEuWYzCkcBt4k6bTWiLhW4uJb2O/JEqRdf6Vk9VMncnB9rl9TEY+Puk5m1F rNO+uAVdoAfEv/expPBzbxw2qQO82Asa8y+HlrI4916VS6/RrInoZ7HkwHhGNQCqvM/X 8hL6we15cLMwheT8Z5Jj3IU8XWLAPzRxSPowl/90OvNIRTgWjp8JPyGb+CrtoduY8bEQ RZpZj3fgTMzkaTM0phdJYYIwtsHkWSai7wcigVsteyPJLlINHLzbH/EYdIU0SCDgU1oy W7AA== X-Gm-Message-State: AD7BkJJ6TpIctKLAa719GNcw6/mbm8N6dH1/D7DNNRcPLhAlJK6zfSN6zsrCzkumY8+grg== X-Received: by 10.28.47.216 with SMTP id v207mr676816wmv.7.1456793166620; Mon, 29 Feb 2016 16:46:06 -0800 (PST) Received: from localhost.localdomain (84.Red-83-63-204.staticIP.rima-tde.net. [83.63.204.84]) by smtp.gmail.com with ESMTPSA id v66sm18666770wmb.18.2016.02.29.16.46.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 29 Feb 2016 16:46:05 -0800 (PST) From: Marc Sune To: "dev@dpdk.org" , "Lu, Wenzhuo" , "Zhang, Helin" , "Harish Patil" , "Chen, Jing D" Date: Tue, 1 Mar 2016 01:45:48 +0100 Message-Id: <1456793151-1475-2-git-send-email-marcdevel@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1456793151-1475-1-git-send-email-marcdevel@gmail.com> References: <1455488259-1000-1-git-send-email-marcdevel@gmail.com> <1456793151-1475-1-git-send-email-marcdevel@gmail.com> Subject: [dpdk-dev] [PATCH v9 1/4] ethdev: Added ETH_SPEED_CAP bitmap for ports X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Added constants and bitmap to struct rte_eth_dev_info to be used by PMDs. Signed-off-by: Marc Sune --- lib/librte_ether/rte_ethdev.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h index 16da821..83ddbb7 100644 --- a/lib/librte_ether/rte_ethdev.h +++ b/lib/librte_ether/rte_ethdev.h @@ -824,6 +824,29 @@ struct rte_eth_conf { #define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000080 /**< Used for tunneling packet. */ #define DEV_TX_OFFLOAD_QINQ_INSERT 0x00000100 +/** + * Device supported speeds + */ +#define ETH_SPEED_CAP_NOT_PHY (0) /*< No phy media > */ +#define ETH_SPEED_CAP_10M_HD (1 << 0) /*< 10 Mbps half-duplex> */ +#define ETH_SPEED_CAP_10M_FD (1 << 1) /*< 10 Mbps full-duplex> */ +#define ETH_SPEED_CAP_100M_HD (1 << 2) /*< 100 Mbps half-duplex> */ +#define ETH_SPEED_CAP_100M_FD (1 << 3) /*< 100 Mbps full-duplex> */ +#define ETH_SPEED_CAP_1G (1 << 4) /*< 1 Gbps > */ +#define ETH_SPEED_CAP_2_5G (1 << 5) /*< 2.5 Gbps > */ +#define ETH_SPEED_CAP_5G (1 << 6) /*< 5 Gbps > */ +#define ETH_SPEED_CAP_10G (1 << 7) /*< 10 Mbps > */ +#define ETH_SPEED_CAP_20G (1 << 8) /*< 20 Gbps > */ +#define ETH_SPEED_CAP_25G (1 << 9) /*< 25 Gbps > */ +#define ETH_SPEED_CAP_40G (1 << 10) /*< 40 Gbps > */ +#define ETH_SPEED_CAP_50G (1 << 11) /*< 50 Gbps > */ +#define ETH_SPEED_CAP_56G (1 << 12) /*< 56 Gbps > */ +#define ETH_SPEED_CAP_100G (1 << 13) /*< 100 Gbps > */ + + +/** + * Ethernet device information + */ struct rte_eth_dev_info { struct rte_pci_device *pci_dev; /**< Device PCI information. */ const char *driver_name; /**< Device Driver name. */ @@ -852,6 +875,7 @@ struct rte_eth_dev_info { uint16_t vmdq_pool_base; /**< First ID of VMDQ pools. */ struct rte_eth_desc_lim rx_desc_lim; /**< RX descriptors limits */ struct rte_eth_desc_lim tx_desc_lim; /**< TX descriptors limits */ + uint32_t speed_capa; /**< Supported speeds bitmap (ETH_SPEED_CAP_). */ }; /**