[dpdk-dev,v4,4/4] cache/slow-path: reduce cache align requirement for 128-byte cache targets
Commit Message
slow-path data structures need not be 128-byte cache aligned.
Reduce the alignment to 64-byte to save the memory.
No behavior change for 64-byte cache aligned systems as minimum
cache line size as 64.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
lib/librte_ether/rte_ethdev.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
@@ -863,7 +863,7 @@ struct rte_eth_rxq_info {
struct rte_eth_rxconf conf; /**< queue config parameters. */
uint8_t scattered_rx; /**< scattered packets RX supported. */
uint16_t nb_desc; /**< configured number of RXDs. */
-} __rte_cache_aligned;
+} __rte_cache_min_aligned;
/**
* Ethernet device TX queue information structure.
@@ -872,7 +872,7 @@ struct rte_eth_rxq_info {
struct rte_eth_txq_info {
struct rte_eth_txconf conf; /**< queue config parameters. */
uint16_t nb_desc; /**< configured number of TXDs. */
-} __rte_cache_aligned;
+} __rte_cache_min_aligned;
/** Maximum name length for extended statistics counters */
#define RTE_ETH_XSTATS_NAME_SIZE 64