From patchwork Fri Jan 29 00:42:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Sune X-Patchwork-Id: 10205 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 78AA3C4F0; Fri, 29 Jan 2016 01:42:37 +0100 (CET) Received: from mail-wm0-f66.google.com (mail-wm0-f66.google.com [74.125.82.66]) by dpdk.org (Postfix) with ESMTP id 39240C492 for ; Fri, 29 Jan 2016 01:42:34 +0100 (CET) Received: by mail-wm0-f66.google.com with SMTP id 128so4734010wmz.3 for ; Thu, 28 Jan 2016 16:42:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tPmvxOkczp/un0F2RBAsd16mqa3E5atifg3mF4tlqmY=; b=PFV1hRwFNvow1U614hJiYfx4oR5S5cjxK5sG6CoMUZabapj+nugxmYk5Ighs2dJW59 K5ocyJmLwMZr/Ur6eGSaJSFlwDyMc23mLG7c7nJ4BFzouy5aCLul6Yr9iFmpiBgsrU7y fmMapJ+Tq63A75d7g4ayoy+3n8PbBHWtvBINNOpPP/b18IR3f4pTAYqjqCjklkLLEOlO N9ltHL6DAaSwDcJdOSxOlHDMT6Pkr1m7K8QqWcxcKLegOP03xmRcFvWtyrJVPuFjgiHj YMCGRIZPmszvIy0gGhqSJnOEPNZuw4ZZGlWgMsKMaaRhxHbYeAEYXHdukoIpY/l3zvFO EoLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tPmvxOkczp/un0F2RBAsd16mqa3E5atifg3mF4tlqmY=; b=NOxy5bA6vP5c2eNULZNVzJd2W7+d6cCjAuf9O81LJXD+nq8LoT0ev0/MSwQv3waNNl 55W3YMLubh3VpbkMMvTGdYXgjhQnO2Qnkt841NIOrRXWC4w+pjUzr2jfQ7TG0dxd0GZ4 yTc+FMT7i3tF/na5tuvHL0MfGog47vg7J9kTxR+/mxW0Z8PQYwNQncpYu/SjFHE89L2k snv7we3hYHOL4Vy0bdgQTYy666L7wTuBicRsvmekGAelzL3M+EpBRBFPikVEIDHpUcOu 430rq8dDfLIj+Xx/IpUuvangWun0qhppgsIOXRMgbCsKAhV352HU4VYnyDij9kZQZlGF obCg== X-Gm-Message-State: AG10YOT2YK6nfNujriX3byqxHFeWp52KXGLlzAiAr83bOxpNW34DC7vF8cCuDwEpkwLIig== X-Received: by 10.28.18.21 with SMTP id 21mr5553543wms.11.1454028154119; Thu, 28 Jan 2016 16:42:34 -0800 (PST) Received: from localhost.localdomain (251.Red-79-159-160.dynamicIP.rima-tde.net. [79.159.160.251]) by smtp.gmail.com with ESMTPSA id c26sm4078518wmi.24.2016.01.28.16.42.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 28 Jan 2016 16:42:33 -0800 (PST) From: Marc Sune To: dev@dpdk.org, Wenzhuo Lu , Helin Zhang , Harish Patil , Jing Chen Date: Fri, 29 Jan 2016 01:42:03 +0100 Message-Id: <1454028127-10401-2-git-send-email-marcdevel@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454028127-10401-1-git-send-email-marcdevel@gmail.com> References: <1445810400-8978-1-git-send-email-marcdevel@gmail.com> <1454028127-10401-1-git-send-email-marcdevel@gmail.com> Subject: [dpdk-dev] [PATCH v7 1/5] ethdev: Added ETH_SPEED_CAP bitmap for ports X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Added constants and bitmap to struct rte_eth_dev_info to be used by PMDs. Signed-off-by: Marc Sune --- lib/librte_ether/rte_ethdev.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h index 8710dd7..dbc1599 100644 --- a/lib/librte_ether/rte_ethdev.h +++ b/lib/librte_ether/rte_ethdev.h @@ -824,6 +824,29 @@ struct rte_eth_conf { #define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000080 /**< Used for tunneling packet. */ #define DEV_TX_OFFLOAD_QINQ_INSERT 0x00000100 +/** + * Device supported speeds + */ +#define ETH_SPEED_CAP_NOT_PHY (0) /*< No phy media > */ +#define ETH_SPEED_CAP_10M_HD (1 << 0) /*< 10 Mbps half-duplex> */ +#define ETH_SPEED_CAP_10M_FD (1 << 1) /*< 10 Mbps full-duplex> */ +#define ETH_SPEED_CAP_100M_HD (1 << 2) /*< 100 Mbps half-duplex> */ +#define ETH_SPEED_CAP_100M_FD (1 << 3) /*< 100 Mbps full-duplex> */ +#define ETH_SPEED_CAP_1G (1 << 4) /*< 1 Gbps > */ +#define ETH_SPEED_CAP_2_5G (1 << 5) /*< 2.5 Gbps > */ +#define ETH_SPEED_CAP_5G (1 << 6) /*< 5 Gbps > */ +#define ETH_SPEED_CAP_10G (1 << 7) /*< 10 Mbps > */ +#define ETH_SPEED_CAP_20G (1 << 8) /*< 20 Gbps > */ +#define ETH_SPEED_CAP_25G (1 << 9) /*< 25 Gbps > */ +#define ETH_SPEED_CAP_40G (1 << 10) /*< 40 Gbps > */ +#define ETH_SPEED_CAP_50G (1 << 11) /*< 50 Gbps > */ +#define ETH_SPEED_CAP_56G (1 << 12) /*< 56 Gbps > */ +#define ETH_SPEED_CAP_100G (1 << 13) /*< 100 Gbps > */ + + +/** + * Ethernet device information + */ struct rte_eth_dev_info { struct rte_pci_device *pci_dev; /**< Device PCI information. */ const char *driver_name; /**< Device Driver name. */ @@ -852,6 +875,7 @@ struct rte_eth_dev_info { uint16_t vmdq_pool_base; /**< First ID of VMDQ pools. */ struct rte_eth_desc_lim rx_desc_lim; /**< RX descriptors limits */ struct rte_eth_desc_lim tx_desc_lim; /**< TX descriptors limits */ + uint32_t speed_capa; /**< Supported speeds bitmap (ETH_SPEED_CAP_). */ }; /**