From patchwork Tue Jan 19 02:48:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenzhuo Lu X-Patchwork-Id: 9957 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id A2B48919D; Tue, 19 Jan 2016 03:48:35 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id CB41B8E95 for ; Tue, 19 Jan 2016 03:48:34 +0100 (CET) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP; 18 Jan 2016 18:48:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,315,1449561600"; d="scan'208";a="31846008" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga004.fm.intel.com with ESMTP; 18 Jan 2016 18:48:33 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id u0J2mUoe010495; Tue, 19 Jan 2016 10:48:30 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id u0J2mR49025649; Tue, 19 Jan 2016 10:48:29 +0800 Received: (from wenzhuol@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id u0J2mRvs025645; Tue, 19 Jan 2016 10:48:27 +0800 From: Wenzhuo Lu To: dev@dpdk.org Date: Tue, 19 Jan 2016 10:48:07 +0800 Message-Id: <1453171693-25571-7-git-send-email-wenzhuo.lu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1453171693-25571-1-git-send-email-wenzhuo.lu@intel.com> References: <1453171693-25571-1-git-send-email-wenzhuo.lu@intel.com> Subject: [dpdk-dev] [PATCH 06/12] ixgbe/base: add definition of a register for mac SGMII busy X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The X550EM_a device provides the MAC_SGMII_BUSY register to indicate when slow SGMII register writes complete. Add definitions for the register. No definitions are provided for the individual bits under the theory that it is better to wait for everything to complete when needed rather than try to map out which reads need to wait for which writes. So we should wait when anything is marked as "busy". Signed-off-by: Wenzhuo Lu --- drivers/net/ixgbe/base/ixgbe_type.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ixgbe/base/ixgbe_type.h b/drivers/net/ixgbe/base/ixgbe_type.h index 1285cfd..47296b7 100644 --- a/drivers/net/ixgbe/base/ixgbe_type.h +++ b/drivers/net/ixgbe/base/ixgbe_type.h @@ -1285,6 +1285,7 @@ struct ixgbe_dmac_config { #define IXGBE_XPCSS 0x04290 #define IXGBE_MFLCN 0x04294 #define IXGBE_SERDESC 0x04298 +#define IXGBE_MAC_SGMII_BUSY 0x04298 #define IXGBE_MACS 0x0429C #define IXGBE_AUTOC 0x042A0 #define IXGBE_LINKS 0x042A4