From patchwork Mon Jan 18 12:30:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Marchand X-Patchwork-Id: 9937 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 2F53B8E94; Mon, 18 Jan 2016 13:31:02 +0100 (CET) Received: from mail-wm0-f46.google.com (mail-wm0-f46.google.com [74.125.82.46]) by dpdk.org (Postfix) with ESMTP id 7EA6C8E59 for ; Mon, 18 Jan 2016 13:30:57 +0100 (CET) Received: by mail-wm0-f46.google.com with SMTP id r129so49345144wmr.0 for ; Mon, 18 Jan 2016 04:30:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ThFzWIKub9nZ0STwxk6RwKzb/OeDmgjSGPLhy+4MHy4=; b=LifLN/V12MfoKBjeyC3DPhdgH4A/QyXgXw+ODl87vKfS5fpGTXHMPD+TNAu0Rhwrzv mMnT5172lSpH5qKecXYzMnJEHjk5LZlL3OT1a6yH/ZGYPJy1s2l5AQx2geBw+r0THHYM 6WaKsn6yr7CJCRdCK8w3DyFOv5RtJF0+/EJ77QIoTZ3OTRkioLWRony8H3lRcFb80GV8 b7vJv81PQ8g1SEZFa3hEHCaZh0cZWK1gw9c8eCpzoA9V9rMy7XBSi8iC2VDd+f0nbPav iF9D2VRDv1NJvuvvZFXXRcBCpIwFwF/r3SH0qCEUcEWWGzYrpupDV4L1iuey/2UqJbrh dKWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ThFzWIKub9nZ0STwxk6RwKzb/OeDmgjSGPLhy+4MHy4=; b=XyTMMI3+UOCDBE+b7a1EXo8vG3DQgNtaMA9CaF/fZ/Y63zenTgDkJ9A+f6rz82nr1v 7cL4R7WiayRpQ+UfjCxDNWPp7HaVs08D4zQ+WWohtmHM1owk4yyk3y+R+KuCgYKhU6hk PnxAwXxWVg4sU+g0u+Wb/bfeziVouxbg4nFWdiVZPvc8RhJUT7EMTrXfjLLAx5mnCGln ahNBJ3uOwEXK6m/GFgUU93V0vDuN9FhWQFaiiiWZ0nmWMc/tGF47fMt2HFIrB6eR1xRI oiiqE8+U8H2L6HZUdvBAVJeuaACIPnzG6F4P4RnB1ZEpoiNTeJ7p4QwlRp+N5vXtY+m/ iKYw== X-Gm-Message-State: AG10YORhS9ZflAJRrSLk7n3dThMTwGfoyh/b7SxN9RCcYmK53rcO3lVq1qejYwwupqi6kylF X-Received: by 10.194.52.72 with SMTP id r8mr21955031wjo.148.1453120257345; Mon, 18 Jan 2016 04:30:57 -0800 (PST) Received: from gloops.dev.6wind.com (144.77.126.78.rev.sfr.net. [78.126.77.144]) by smtp.gmail.com with ESMTPSA id u191sm15606572wmd.4.2016.01.18.04.30.56 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 18 Jan 2016 04:30:56 -0800 (PST) From: David Marchand To: dev@dpdk.org Date: Mon, 18 Jan 2016 13:30:41 +0100 Message-Id: <1453120248-28274-4-git-send-email-david.marchand@6wind.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453120248-28274-1-git-send-email-david.marchand@6wind.com> References: <1452430254-30390-1-git-send-email-david.marchand@6wind.com> <1453120248-28274-1-git-send-email-david.marchand@6wind.com> Subject: [dpdk-dev] [PATCH v2 03/10] i40e: move pci device ids to driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Since the base driver already defines all pci device ids, no need to redefine them, let's just drop the previous RTE_PCI_DEV_ID_DECL* stuff. Signed-off-by: David Marchand --- Changes since v1: - indent fix drivers/net/i40e/i40e_ethdev.c | 20 +++++++-- drivers/net/i40e/i40e_ethdev_vf.c | 8 ++-- lib/librte_eal/common/include/rte_pci_dev_ids.h | 60 ------------------------- 3 files changed, 22 insertions(+), 66 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index bf6220d..e9f6587 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -416,9 +416,23 @@ static int i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, static const struct rte_pci_id pci_id_i40e_map[] = { -#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)}, -#include "rte_pci_dev_ids.h" -{ .vendor_id = 0, /* sentinel */ }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_XL710) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QEMU) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_A) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_B) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_C) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_A) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_B) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_C) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2_A) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) }, + { .vendor_id = 0, /* sentinel */ }, }; static const struct eth_dev_ops i40e_eth_dev_ops = { diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index 14d2a50..9302f27 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -1117,9 +1117,11 @@ i40evf_get_link_status(struct rte_eth_dev *dev, struct rte_eth_link *link) } static const struct rte_pci_id pci_id_i40evf_map[] = { -#define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)}, -#include "rte_pci_dev_ids.h" -{ .vendor_id = 0, /* sentinel */ }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) }, + { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF_HV) }, + { .vendor_id = 0, /* sentinel */ }, }; static inline int diff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h index ab6c4fb..f1f3e13 100644 --- a/lib/librte_eal/common/include/rte_pci_dev_ids.h +++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h @@ -68,8 +68,6 @@ * driver which is a para virtualization driver running in guest virtual machine. * The inclusion of these in an array built using this file depends on the * definition of - * RTE_PCI_DEV_ID_DECL_I40E - * RTE_PCI_DEV_ID_DECL_I40EVF * RTE_PCI_DEV_ID_DECL_VIRTIO * at the time when this file is included. * @@ -91,14 +89,6 @@ * Note that this file can be included multiple times within the same file. */ -#ifndef RTE_PCI_DEV_ID_DECL_I40E -#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) -#endif - -#ifndef RTE_PCI_DEV_ID_DECL_I40EVF -#define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev) -#endif - #ifndef RTE_PCI_DEV_ID_DECL_VIRTIO #define RTE_PCI_DEV_ID_DECL_VIRTIO(vend, dev) #endif @@ -152,42 +142,6 @@ #define PCI_VENDOR_ID_BROADCOM 0x14E4 #endif -/*************** Physical I40E devices from i40e_type.h *****************/ - -#define I40E_DEV_ID_SFP_XL710 0x1572 -#define I40E_DEV_ID_QEMU 0x1574 -#define I40E_DEV_ID_KX_A 0x157F -#define I40E_DEV_ID_KX_B 0x1580 -#define I40E_DEV_ID_KX_C 0x1581 -#define I40E_DEV_ID_QSFP_A 0x1583 -#define I40E_DEV_ID_QSFP_B 0x1584 -#define I40E_DEV_ID_QSFP_C 0x1585 -#define I40E_DEV_ID_10G_BASE_T 0x1586 -#define I40E_DEV_ID_20G_KR2 0x1587 -#define I40E_DEV_ID_20G_KR2_A 0x1588 -#define I40E_DEV_ID_10G_BASE_T4 0x1589 -#define I40E_DEV_ID_X722_A0 0x374C -#define I40E_DEV_ID_SFP_X722 0x37D0 -#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1 -#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2 - -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_XL710) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QEMU) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_A) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_B) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_C) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_A) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_B) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_C) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_20G_KR2) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_20G_KR2_A) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T4) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_A0) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_X722) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_1G_BASE_T_X722) -RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T_X722) - /*************** Physical FM10K devices from fm10k_type.h ***************/ #define FM10K_DEV_ID_PF 0x15A4 @@ -196,18 +150,6 @@ RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T_X722) RTE_PCI_DEV_ID_DECL_FM10K(PCI_VENDOR_ID_INTEL, FM10K_DEV_ID_PF) RTE_PCI_DEV_ID_DECL_FM10K(PCI_VENDOR_ID_INTEL, FM10K_DEV_ID_SDI_FM10420_QDA2) -/****************** Virtual I40E devices from i40e_type.h ********************/ - -#define I40E_DEV_ID_VF 0x154C -#define I40E_DEV_ID_VF_HV 0x1571 -#define I40E_DEV_ID_X722_VF 0x37CD -#define I40E_DEV_ID_X722_VF_HV 0x37D9 - -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF) -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF_HV) -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_VF) -RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_X722_VF_HV) - /****************** Virtio devices from virtio.h ******************/ #define QUMRANET_DEV_ID_VIRTIO 0x1000 @@ -284,8 +226,6 @@ RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57840_MF) */ #undef RTE_PCI_DEV_ID_DECL_BNX2X #undef RTE_PCI_DEV_ID_DECL_BNX2XVF -#undef RTE_PCI_DEV_ID_DECL_I40E -#undef RTE_PCI_DEV_ID_DECL_I40EVF #undef RTE_PCI_DEV_ID_DECL_VIRTIO #undef RTE_PCI_DEV_ID_DECL_VMXNET3 #undef RTE_PCI_DEV_ID_DECL_FM10K