diff --git a/app/test-pmd/Makefile b/app/test-pmd/Makefile
index 72426f3..a8899b8 100644
--- a/app/test-pmd/Makefile
+++ b/app/test-pmd/Makefile
@@ -64,6 +64,8 @@ ifeq ($(CONFIG_RTE_EXEC_ENV_LINUXAPP),y)
 CFLAGS_mempool_anon.o := -D_GNU_SOURCE
 endif
 CFLAGS_cmdline.o := -D_GNU_SOURCE
+# for bypass pci device ids
+CFLAGS_cmdline.o += -I$(RTE_SDK)/drivers/net/ixgbe
 
 # this application needs libraries first
 DEPDIRS-y += lib drivers
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 73298c9..fdb2e1b 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -9816,7 +9816,7 @@ cmd_reconfig_device_queue(portid_t id, uint8_t dev, uint8_t queue)
 }
 
 #ifdef RTE_NIC_BYPASS
-#include <rte_pci_dev_ids.h>
+#include <ixgbe_pci_dev_ids.h>
 uint8_t
 bypass_is_supported(portid_t port_id)
 {
diff --git a/app/test/Makefile b/app/test/Makefile
index 687ae59..13fed78 100644
--- a/app/test/Makefile
+++ b/app/test/Makefile
@@ -170,6 +170,7 @@ endif
 
 # pci tests want to know some pci devices ids
 CFLAGS_test_pci.o += -I$(RTE_SDK)/drivers/net/e1000
+CFLAGS_test_pci.o += -I$(RTE_SDK)/drivers/net/ixgbe
 
 # this application needs libraries first
 DEPDIRS-y += lib drivers
diff --git a/app/test/test_pci.c b/app/test/test_pci.c
index b289138..d6a23d6 100644
--- a/app/test/test_pci.c
+++ b/app/test/test_pci.c
@@ -68,7 +68,7 @@ static int my_driver_init(struct rte_pci_driver *dr,
 struct rte_pci_id my_driver_id[] = {
 
 #define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
-#include <rte_pci_dev_ids.h>
+#include <ixgbe_pci_dev_ids.h>
 
 { .vendor_id = 0, /* sentinel */ },
 };
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 4c4c6df..b31f52e 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -381,7 +381,7 @@ static int ixgbe_timesync_write_time(struct rte_eth_dev *dev,
 static const struct rte_pci_id pci_id_ixgbe_map[] = {
 
 #define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
-#include "rte_pci_dev_ids.h"
+#include "ixgbe_pci_dev_ids.h"
 
 { .vendor_id = 0, /* sentinel */ },
 };
@@ -393,7 +393,7 @@ static const struct rte_pci_id pci_id_ixgbe_map[] = {
 static const struct rte_pci_id pci_id_ixgbevf_map[] = {
 
 #define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
-#include "rte_pci_dev_ids.h"
+#include "ixgbe_pci_dev_ids.h"
 { .vendor_id = 0, /* sentinel */ },
 
 };
diff --git a/drivers/net/ixgbe/ixgbe_pci_dev_ids.h b/drivers/net/ixgbe/ixgbe_pci_dev_ids.h
new file mode 100644
index 0000000..e2da88a
--- /dev/null
+++ b/drivers/net/ixgbe/ixgbe_pci_dev_ids.h
@@ -0,0 +1,191 @@
+/*-
+ * This file is provided under a dual BSD/GPLv2 license.  When using or
+ *   redistributing this file, you may do so under either license.
+ *
+ *   GPL LICENSE SUMMARY
+ *
+ *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of version 2 of the GNU General Public License as
+ *   published by the Free Software Foundation.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *   General Public License for more details.
+ *
+ *   The full GNU General Public License is included in this distribution
+ *   in the file called LICENSE.GPL.
+ *
+ *   Contact Information:
+ *   Intel Corporation
+ *
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in
+ *       the documentation and/or other materials provided with the
+ *       distribution.
+ *     * Neither the name of Intel Corporation nor the names of its
+ *       contributors may be used to endorse or promote products derived
+ *       from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#ifndef RTE_PCI_DEV_ID_DECL_IXGBE
+#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev)
+#endif
+
+#ifndef RTE_PCI_DEV_ID_DECL_IXGBEVF
+#define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)
+#endif
+
+#ifndef PCI_VENDOR_ID_INTEL
+/** Vendor ID used by Intel devices */
+#define PCI_VENDOR_ID_INTEL 0x8086
+#endif
+
+/****************** Physical IXGBE devices from ixgbe_type.h ******************/
+
+#define IXGBE_DEV_ID_82598                      0x10B6
+#define IXGBE_DEV_ID_82598_BX                   0x1508
+#define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
+#define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
+#define IXGBE_DEV_ID_82598AT                    0x10C8
+#define IXGBE_DEV_ID_82598AT2                   0x150B
+#define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
+#define IXGBE_DEV_ID_82598EB_CX4                0x10DD
+#define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
+#define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
+#define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
+#define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
+#define IXGBE_DEV_ID_82599_KX4                  0x10F7
+#define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
+#define IXGBE_DEV_ID_82599_KR                   0x1517
+#define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
+#define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
+#define IXGBE_DEV_ID_82599_CX4                  0x10F9
+#define IXGBE_DEV_ID_82599_SFP                  0x10FB
+#define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
+#define IXGBE_SUBDEV_ID_82599_RNDC              0x1F72
+#define IXGBE_SUBDEV_ID_82599_560FLR            0x17D0
+#define IXGBE_SUBDEV_ID_82599_ECNA_DP           0x0470
+#define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
+#define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
+#define IXGBE_DEV_ID_82599_SFP_EM               0x1507
+#define IXGBE_DEV_ID_82599_SFP_SF2              0x154D
+#define IXGBE_DEV_ID_82599_SFP_SF_QP            0x154A
+#define IXGBE_DEV_ID_82599_QSFP_SF_QP           0x1558
+#define IXGBE_DEV_ID_82599EN_SFP                0x1557
+#define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
+#define IXGBE_DEV_ID_82599_T3_LOM               0x151C
+#define IXGBE_DEV_ID_82599_LS                   0x154F
+#define IXGBE_DEV_ID_X540T                      0x1528
+#define IXGBE_DEV_ID_X540T1                     0x1560
+#define IXGBE_DEV_ID_X550EM_X_SFP               0x15AC
+#define IXGBE_DEV_ID_X550EM_X_10G_T             0x15AD
+#define IXGBE_DEV_ID_X550EM_X_1G_T              0x15AE
+#define IXGBE_DEV_ID_X550T                      0x1563
+#define IXGBE_DEV_ID_X550T1                     0x15D1
+#define IXGBE_DEV_ID_X550EM_X_KX4               0x15AA
+#define IXGBE_DEV_ID_X550EM_X_KR                0x15AB
+
+#ifdef RTE_NIC_BYPASS
+#define IXGBE_DEV_ID_82599_BYPASS               0x155D
+#endif
+
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+	IXGBE_DEV_ID_82598AF_SINGLE_PORT)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+	IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+	IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
+	IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_RNDC)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_560FLR)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_ECNA_DP)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF2)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_LS)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T1)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_SFP)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_10G_T)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_1G_T)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T1)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KX4)
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KR)
+
+#ifdef RTE_NIC_BYPASS
+RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BYPASS)
+#endif
+
+/****************** Virtual IXGBE devices from ixgbe_type.h ******************/
+
+#define IXGBE_DEV_ID_82599_VF                   0x10ED
+#define IXGBE_DEV_ID_82599_VF_HV                0x152E
+#define IXGBE_DEV_ID_X540_VF                    0x1515
+#define IXGBE_DEV_ID_X540_VF_HV                 0x1530
+#define IXGBE_DEV_ID_X550_VF_HV                 0x1564
+#define IXGBE_DEV_ID_X550_VF                    0x1565
+#define IXGBE_DEV_ID_X550EM_X_VF                0x15A8
+#define IXGBE_DEV_ID_X550EM_X_VF_HV             0x15A9
+
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF)
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF_HV)
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF)
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF_HV)
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF_HV)
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF)
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF)
+RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV)
+
+#undef RTE_PCI_DEV_ID_DECL_IXGBE
+#undef RTE_PCI_DEV_ID_DECL_IXGBEVF
diff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h
index d2ea8e6..ab6c4fb 100644
--- a/lib/librte_eal/common/include/rte_pci_dev_ids.h
+++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h
@@ -68,8 +68,6 @@
  * driver which is a para virtualization driver running in guest virtual machine.
  * The inclusion of these in an array built using this file depends on the
  * definition of
- * RTE_PCI_DEV_ID_DECL_IXGBE
- * RTE_PCI_DEV_ID_DECL_IXGBEVF
  * RTE_PCI_DEV_ID_DECL_I40E
  * RTE_PCI_DEV_ID_DECL_I40EVF
  * RTE_PCI_DEV_ID_DECL_VIRTIO
@@ -93,14 +91,6 @@
  * Note that this file can be included multiple times within the same file.
  */
 
-#ifndef RTE_PCI_DEV_ID_DECL_IXGBE
-#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev)
-#endif
-
-#ifndef RTE_PCI_DEV_ID_DECL_IXGBEVF
-#define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)
-#endif
-
 #ifndef RTE_PCI_DEV_ID_DECL_I40E
 #define RTE_PCI_DEV_ID_DECL_I40E(vend, dev)
 #endif
@@ -162,106 +152,6 @@
 #define PCI_VENDOR_ID_BROADCOM 0x14E4
 #endif
 
-/****************** Physical IXGBE devices from ixgbe_type.h ******************/
-
-#define IXGBE_DEV_ID_82598                      0x10B6
-#define IXGBE_DEV_ID_82598_BX                   0x1508
-#define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
-#define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
-#define IXGBE_DEV_ID_82598AT                    0x10C8
-#define IXGBE_DEV_ID_82598AT2                   0x150B
-#define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
-#define IXGBE_DEV_ID_82598EB_CX4                0x10DD
-#define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
-#define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
-#define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
-#define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
-#define IXGBE_DEV_ID_82599_KX4                  0x10F7
-#define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
-#define IXGBE_DEV_ID_82599_KR                   0x1517
-#define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
-#define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
-#define IXGBE_DEV_ID_82599_CX4                  0x10F9
-#define IXGBE_DEV_ID_82599_SFP                  0x10FB
-#define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
-#define IXGBE_SUBDEV_ID_82599_RNDC              0x1F72
-#define IXGBE_SUBDEV_ID_82599_560FLR            0x17D0
-#define IXGBE_SUBDEV_ID_82599_ECNA_DP           0x0470
-#define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
-#define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
-#define IXGBE_DEV_ID_82599_SFP_EM               0x1507
-#define IXGBE_DEV_ID_82599_SFP_SF2              0x154D
-#define IXGBE_DEV_ID_82599_SFP_SF_QP            0x154A
-#define IXGBE_DEV_ID_82599_QSFP_SF_QP           0x1558
-#define IXGBE_DEV_ID_82599EN_SFP                0x1557
-#define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
-#define IXGBE_DEV_ID_82599_T3_LOM               0x151C
-#define IXGBE_DEV_ID_82599_LS                   0x154F
-#define IXGBE_DEV_ID_X540T                      0x1528
-#define IXGBE_DEV_ID_X540T1                     0x1560
-#define IXGBE_DEV_ID_X550EM_X_SFP               0x15AC
-#define IXGBE_DEV_ID_X550EM_X_10G_T             0x15AD
-#define IXGBE_DEV_ID_X550EM_X_1G_T              0x15AE
-#define IXGBE_DEV_ID_X550T                      0x1563
-#define IXGBE_DEV_ID_X550T1                     0x15D1
-#define IXGBE_DEV_ID_X550EM_X_KX4               0x15AA
-#define IXGBE_DEV_ID_X550EM_X_KR                0x15AB
-
-#ifdef RTE_NIC_BYPASS
-#define IXGBE_DEV_ID_82599_BYPASS               0x155D
-#endif
-
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
-	IXGBE_DEV_ID_82598AF_SINGLE_PORT)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
-	IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
-	IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
-	IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_RNDC)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_560FLR)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_ECNA_DP)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF2)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_LS)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T1)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_SFP)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_10G_T)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_1G_T)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T1)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KX4)
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KR)
-
-#ifdef RTE_NIC_BYPASS
-RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BYPASS)
-#endif
-
 /*************** Physical I40E devices from i40e_type.h *****************/
 
 #define I40E_DEV_ID_SFP_XL710           0x1572
@@ -306,26 +196,6 @@ RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T_X722)
 RTE_PCI_DEV_ID_DECL_FM10K(PCI_VENDOR_ID_INTEL, FM10K_DEV_ID_PF)
 RTE_PCI_DEV_ID_DECL_FM10K(PCI_VENDOR_ID_INTEL, FM10K_DEV_ID_SDI_FM10420_QDA2)
 
-/****************** Virtual IXGBE devices from ixgbe_type.h ******************/
-
-#define IXGBE_DEV_ID_82599_VF                   0x10ED
-#define IXGBE_DEV_ID_82599_VF_HV                0x152E
-#define IXGBE_DEV_ID_X540_VF                    0x1515
-#define IXGBE_DEV_ID_X540_VF_HV                 0x1530
-#define IXGBE_DEV_ID_X550_VF_HV                 0x1564
-#define IXGBE_DEV_ID_X550_VF                    0x1565
-#define IXGBE_DEV_ID_X550EM_X_VF                0x15A8
-#define IXGBE_DEV_ID_X550EM_X_VF_HV             0x15A9
-
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF)
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF_HV)
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF)
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF_HV)
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF_HV)
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF)
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF)
-RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV)
-
 /****************** Virtual I40E devices from i40e_type.h ********************/
 
 #define I40E_DEV_ID_VF                  0x154C
@@ -414,8 +284,6 @@ RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57840_MF)
  */
 #undef RTE_PCI_DEV_ID_DECL_BNX2X
 #undef RTE_PCI_DEV_ID_DECL_BNX2XVF
-#undef RTE_PCI_DEV_ID_DECL_IXGBE
-#undef RTE_PCI_DEV_ID_DECL_IXGBEVF
 #undef RTE_PCI_DEV_ID_DECL_I40E
 #undef RTE_PCI_DEV_ID_DECL_I40EVF
 #undef RTE_PCI_DEV_ID_DECL_VIRTIO
diff --git a/lib/librte_eal/linuxapp/kni/Makefile b/lib/librte_eal/linuxapp/kni/Makefile
index 6ac7637..3bdf352 100644
--- a/lib/librte_eal/linuxapp/kni/Makefile
+++ b/lib/librte_eal/linuxapp/kni/Makefile
@@ -44,6 +44,7 @@ MODULE_CFLAGS += -I$(RTE_OUTPUT)/include -I$(SRCDIR)/ethtool/ixgbe -I$(SRCDIR)/e
 MODULE_CFLAGS += -include $(RTE_OUTPUT)/include/rte_config.h
 MODULE_CFLAGS += -Wall -Werror
 MODULE_CFLAGS += -I$(RTE_SDK)/drivers/net/e1000
+MODULE_CFLAGS += -I$(RTE_SDK)/drivers/net/ixgbe
 
 ifeq ($(shell lsb_release -si 2>/dev/null),Ubuntu)
 MODULE_CFLAGS += -DUBUNTU_RELEASE_CODE=$(shell lsb_release -sr | tr -d .)
diff --git a/lib/librte_eal/linuxapp/kni/kni_misc.c b/lib/librte_eal/linuxapp/kni/kni_misc.c
index 96b07c2..f731d7c 100644
--- a/lib/librte_eal/linuxapp/kni/kni_misc.c
+++ b/lib/librte_eal/linuxapp/kni/kni_misc.c
@@ -357,7 +357,7 @@ kni_dev_remove(struct kni_dev *dev)
 		igb_kni_remove(dev->pci_dev);
 		break;
 	#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) case (dev):
-	#include <rte_pci_dev_ids.h>
+	#include <ixgbe_pci_dev_ids.h>
 		ixgbe_kni_remove(dev->pci_dev);
 		break;
 	default:
@@ -515,7 +515,7 @@ kni_ioctl_create(struct net *net,
 				break;
 			#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) \
 							case (dev):
-			#include <rte_pci_dev_ids.h>
+			#include <ixgbe_pci_dev_ids.h>
 				ret = ixgbe_kni_probe(found_pci, &lad_dev);
 				break;
 			default:
