From patchwork Mon Jan 18 03:05:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhihong Wang X-Patchwork-Id: 9934 X-Patchwork-Delegate: thomas@monjalon.net Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 3CE6A8E95; Mon, 18 Jan 2016 11:08:48 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 78D8E8E6D for ; Mon, 18 Jan 2016 11:08:44 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 18 Jan 2016 02:08:44 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,312,1449561600"; d="scan'208";a="729396023" Received: from unknown (HELO dpdk5.sh.intel.com) ([10.239.129.244]) by orsmga003.jf.intel.com with ESMTP; 18 Jan 2016 02:08:43 -0800 From: Zhihong Wang To: dev@dpdk.org Date: Sun, 17 Jan 2016 22:05:14 -0500 Message-Id: <1453086314-30158-6-git-send-email-zhihong.wang@intel.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1453086314-30158-1-git-send-email-zhihong.wang@intel.com> References: <1452752002-107586-1-git-send-email-zhihong.wang@intel.com> <1453086314-30158-1-git-send-email-zhihong.wang@intel.com> Subject: [dpdk-dev] [PATCH v2 5/5] lib/librte_eal: Tune memcpy for prior platforms X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" For prior platforms, add condition for unalignment handling, to keep this operation from interrupting the batch copy loop for aligned cases. Signed-off-by: Zhihong Wang --- .../common/include/arch/x86/rte_memcpy.h | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h index fee954a..d965957 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_memcpy.h +++ b/lib/librte_eal/common/include/arch/x86/rte_memcpy.h @@ -513,10 +513,12 @@ COPY_BLOCK_64_BACK31: * Make store aligned when copy size exceeds 512 bytes */ dstofss = 32 - ((uintptr_t)dst & 0x1F); - n -= dstofss; - rte_mov32((uint8_t *)dst, (const uint8_t *)src); - src = (const uint8_t *)src + dstofss; - dst = (uint8_t *)dst + dstofss; + if (dstofss > 0) { + n -= dstofss; + rte_mov32((uint8_t *)dst, (const uint8_t *)src); + src = (const uint8_t *)src + dstofss; + dst = (uint8_t *)dst + dstofss; + } /** * Copy 256-byte blocks. @@ -833,11 +835,13 @@ COPY_BLOCK_64_BACK15: * backwards access. */ dstofss = 16 - ((uintptr_t)dst & 0x0F) + 16; - n -= dstofss; - rte_mov32((uint8_t *)dst, (const uint8_t *)src); - src = (const uint8_t *)src + dstofss; - dst = (uint8_t *)dst + dstofss; - srcofs = ((uintptr_t)src & 0x0F); + if (dstofss > 0) { + n -= dstofss; + rte_mov32((uint8_t *)dst, (const uint8_t *)src); + src = (const uint8_t *)src + dstofss; + dst = (uint8_t *)dst + dstofss; + srcofs = ((uintptr_t)src & 0x0F); + } /** * For aligned copy