From patchwork Wed Dec 30 08:35:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jing D" X-Patchwork-Id: 9686 X-Patchwork-Delegate: bruce.richardson@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id A27728D93; Wed, 30 Dec 2015 09:36:05 +0100 (CET) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 857777EEF for ; Wed, 30 Dec 2015 09:36:03 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP; 30 Dec 2015 00:35:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,499,1444719600"; d="scan'208";a="883356745" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga002.fm.intel.com with ESMTP; 30 Dec 2015 00:35:44 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id tBU8Zdaj021745; Wed, 30 Dec 2015 16:35:39 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id tBU8ZbJB030766; Wed, 30 Dec 2015 16:35:39 +0800 Received: (from jingche2@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tBU8ZbrR030762; Wed, 30 Dec 2015 16:35:37 +0800 From: "Chen Jing D(Mark)" To: dev@dpdk.org Date: Wed, 30 Dec 2015 16:35:35 +0800 Message-Id: <1451464535-30732-1-git-send-email-jing.d.chen@intel.com> X-Mailer: git-send-email 1.7.12.2 Subject: [dpdk-dev] [PATCH] fm10k: allocate logical ports for flow director X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: "Chen Jing D(Mark)" In fm10k, PF, VF, VMDQ or queues binding to flow director rule can be considered as a logical port. Original implementation only create single one for all cases. This change creates totally 128 logical ones, first 64 for PF and VMDQ, second 64 for flow director. Registers DGLORTDEC/DGLORTMAP define rules how to classify packets into different queues. Now only PF and VMDQ cases are considered. This change add rules for flow director. Signed-off-by: Chen Jing D(Mark) Acked-by: Shaopeng He --- drivers/net/fm10k/fm10k_ethdev.c | 54 +++++++++++++++++++------------------- 1 files changed, 27 insertions(+), 27 deletions(-) diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c index e4aed94..6662157 100644 --- a/drivers/net/fm10k/fm10k_ethdev.c +++ b/drivers/net/fm10k/fm10k_ethdev.c @@ -55,6 +55,13 @@ #define CHARS_PER_UINT32 (sizeof(uint32_t)) #define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1) +/* First 64 Logical ports for PF/VMDQ, second 64 for Flow director */ +#define MAX_LPORT_NUM 128 +#define GLORT_FD_Q_BASE 0x40 +#define GLORT_PF_MASK 0xFFC0 +#define GLORT_FD_MASK GLORT_PF_MASK +#define GLORT_FD_INDEX GLORT_FD_Q_BASE + static void fm10k_close_mbx_service(struct fm10k_hw *hw); static void fm10k_dev_promiscuous_enable(struct rte_eth_dev *dev); static void fm10k_dev_promiscuous_disable(struct rte_eth_dev *dev); @@ -571,22 +578,11 @@ fm10k_dev_rss_configure(struct rte_eth_dev *dev) } static void -fm10k_dev_logic_port_update(struct rte_eth_dev *dev, - uint16_t nb_lport_old, uint16_t nb_lport_new) +fm10k_dev_logic_port_update(struct rte_eth_dev *dev, uint16_t nb_lport_new) { struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private); uint32_t i; - fm10k_mbx_lock(hw); - /* Disable previous logic ports */ - if (nb_lport_old) - hw->mac.ops.update_lport_state(hw, hw->mac.dglort_map, - nb_lport_old, false); - /* Enable new logic ports */ - hw->mac.ops.update_lport_state(hw, hw->mac.dglort_map, - nb_lport_new, true); - fm10k_mbx_unlock(hw); - for (i = 0; i < nb_lport_new; i++) { /* Set unicast mode by default. App can change * to other mode in other API func. @@ -606,7 +602,7 @@ fm10k_dev_mq_rx_configure(struct rte_eth_dev *dev) struct rte_eth_conf *dev_conf = &dev->data->dev_conf; struct fm10k_macvlan_filter_info *macvlan; uint16_t nb_queue_pools = 0; /* pool number in configuration */ - uint16_t nb_lport_new, nb_lport_old; + uint16_t nb_lport_new; macvlan = FM10K_DEV_PRIVATE_TO_MACVLAN(dev->data->dev_private); vmdq_conf = &dev->data->dev_conf.rx_adv_conf.vmdq_rx_conf; @@ -624,9 +620,8 @@ fm10k_dev_mq_rx_configure(struct rte_eth_dev *dev) if (macvlan->nb_queue_pools == nb_queue_pools) return; - nb_lport_old = macvlan->nb_queue_pools ? macvlan->nb_queue_pools : 1; nb_lport_new = nb_queue_pools ? nb_queue_pools : 1; - fm10k_dev_logic_port_update(dev, nb_lport_old, nb_lport_new); + fm10k_dev_logic_port_update(dev, nb_lport_new); /* reset MAC/VLAN as it's based on VMDQ or PF main VSI */ memset(dev->data->mac_addrs, 0, @@ -997,7 +992,7 @@ static void fm10k_dev_dglort_map_configure(struct rte_eth_dev *dev) { struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint32_t dglortdec, pool_len, rss_len, i; + uint32_t dglortdec, pool_len, rss_len, i, dglortmask; uint16_t nb_queue_pools; struct fm10k_macvlan_filter_info *macvlan; @@ -1005,16 +1000,24 @@ fm10k_dev_dglort_map_configure(struct rte_eth_dev *dev) nb_queue_pools = macvlan->nb_queue_pools; pool_len = nb_queue_pools ? fls(nb_queue_pools - 1) : 0; rss_len = fls(dev->data->nb_rx_queues - 1) - pool_len; - dglortdec = (rss_len << FM10K_DGLORTDEC_RSSLENGTH_SHIFT) | pool_len; - - /* Establish only MAP 0 as valid */ - FM10K_WRITE_REG(hw, FM10K_DGLORTMAP(0), FM10K_DGLORTMAP_ANY); + /* GLORT 0x0-0x3F are used by PF and VMDQ, 0x40-0x7F used by FD */ + dglortdec = (rss_len << FM10K_DGLORTDEC_RSSLENGTH_SHIFT) | pool_len; + dglortmask = (GLORT_PF_MASK << FM10K_DGLORTMAP_MASK_SHIFT) | + hw->mac.dglort_map; + FM10K_WRITE_REG(hw, FM10K_DGLORTMAP(0), dglortmask); /* Configure VMDQ/RSS DGlort Decoder */ FM10K_WRITE_REG(hw, FM10K_DGLORTDEC(0), dglortdec); + /* Flow Director configurations, only queue number is valid. */ + dglortdec = fls(dev->data->nb_rx_queues - 1); + dglortmask = (GLORT_FD_MASK << FM10K_DGLORTMAP_MASK_SHIFT) | + (hw->mac.dglort_map + GLORT_FD_Q_BASE); + FM10K_WRITE_REG(hw, FM10K_DGLORTMAP(1), dglortmask); + FM10K_WRITE_REG(hw, FM10K_DGLORTDEC(1), dglortdec); + /* Invalidate all other GLORT entries */ - for (i = 1; i < FM10K_DGLORT_COUNT; i++) + for (i = 2; i < FM10K_DGLORT_COUNT; i++) FM10K_WRITE_REG(hw, FM10K_DGLORTMAP(i), FM10K_DGLORTMAP_NONE); } @@ -1142,16 +1145,12 @@ static void fm10k_dev_close(struct rte_eth_dev *dev) { struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint16_t nb_lport; - struct fm10k_macvlan_filter_info *macvlan; PMD_INIT_FUNC_TRACE(); - macvlan = FM10K_DEV_PRIVATE_TO_MACVLAN(dev->data->dev_private); - nb_lport = macvlan->nb_queue_pools ? macvlan->nb_queue_pools : 1; fm10k_mbx_lock(hw); hw->mac.ops.update_lport_state(hw, hw->mac.dglort_map, - nb_lport, false); + MAX_LPORT_NUM, false); fm10k_mbx_unlock(hw); /* Stop mailbox service first */ @@ -2671,7 +2670,8 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev) */ fm10k_mbx_lock(hw); /* Enable port first */ - hw->mac.ops.update_lport_state(hw, hw->mac.dglort_map, 1, 1); + hw->mac.ops.update_lport_state(hw, hw->mac.dglort_map, + MAX_LPORT_NUM, 1); /* Set unicast mode by default. App can change to other mode in other * API func.