[dpdk-dev,1/2] eal: introduce rte_prefetch_non_temporal
Commit Message
non-temporal/transient/stream version of rte_prefetch0()
The non-temporal prefetch is intended as a prefetch hint that processor
will use the prefetched data only once or short period,
unlike the rte_prefetch0() function which imply that
prefetched data to use repeatedly.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
lib/librte_eal/common/include/arch/arm/rte_prefetch_32.h | 5 +++++
lib/librte_eal/common/include/arch/arm/rte_prefetch_64.h | 5 +++++
lib/librte_eal/common/include/arch/ppc_64/rte_prefetch.h | 5 +++++
lib/librte_eal/common/include/arch/tile/rte_prefetch.h | 5 +++++
lib/librte_eal/common/include/arch/x86/rte_prefetch.h | 5 +++++
lib/librte_eal/common/include/generic/rte_prefetch.h | 12 ++++++++++++
6 files changed, 37 insertions(+)
Comments
Please arch maintainers, your ack would be appreciated.
2015-12-06 20:54, Jerin Jacob:
> +static inline void rte_prefetch_non_temporal(const volatile void *p)
> +{
> + rte_prefetch0(p);
> +}
A comment about using the same instruction for temporal and non-temporal?
> +/**
> + * Prefetch a cache line into all cache levels(non-temporal/transient version)
space missing before paren
I am OK with this patch.
On Sun, 6 Dec 2015 20:54:29 +0530
Jerin Jacob <jerin.jacob@caviumnetworks.com> wrote:
> non-temporal/transient/stream version of rte_prefetch0()
>
> The non-temporal prefetch is intended as a prefetch hint that processor
> will use the prefetched data only once or short period,
> unlike the rte_prefetch0() function which imply that
> prefetched data to use repeatedly.
>
> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jan Viktorin <viktorin@rehivetech.com>
@@ -54,6 +54,11 @@ static inline void rte_prefetch2(const volatile void *p)
asm volatile ("pld [%0]" : : "r" (p));
}
+static inline void rte_prefetch_non_temporal(const volatile void *p)
+{
+ rte_prefetch0(p);
+}
+
#ifdef __cplusplus
}
#endif
@@ -54,6 +54,11 @@ static inline void rte_prefetch2(const volatile void *p)
asm volatile ("PRFM PLDL3KEEP, [%0]" : : "r" (p));
}
+static inline void rte_prefetch_non_temporal(const volatile void *p)
+{
+ asm volatile ("PRFM PLDL1STRM, [%0]" : : "r" (p));
+}
+
#ifdef __cplusplus
}
#endif
@@ -54,6 +54,11 @@ static inline void rte_prefetch2(const volatile void *p)
asm volatile ("dcbt 0,%[p],1" : : [p] "r" (p));
}
+static inline void rte_prefetch_non_temporal(const volatile void *p)
+{
+ rte_prefetch0(p);
+}
+
#ifdef __cplusplus
}
#endif
@@ -54,6 +54,11 @@ static inline void rte_prefetch2(const volatile void *p)
__builtin_prefetch((const void *)(uintptr_t)p, 0, 1);
}
+static inline void rte_prefetch_non_temporal(const volatile void *p)
+{
+ rte_prefetch0(p);
+}
+
#ifdef __cplusplus
}
#endif
@@ -55,6 +55,11 @@ static inline void rte_prefetch2(const volatile void *p)
asm volatile ("prefetcht2 %[p]" : : [p] "m" (*(const volatile char *)p));
}
+static inline void rte_prefetch_non_temporal(const volatile void *p)
+{
+ asm volatile ("prefetchnta %[p]" : : [p] "m" (*(const volatile char *)p));
+}
+
#ifdef __cplusplus
}
#endif
@@ -68,4 +68,16 @@ static inline void rte_prefetch1(const volatile void *p);
*/
static inline void rte_prefetch2(const volatile void *p);
+/**
+ * Prefetch a cache line into all cache levels(non-temporal/transient version)
+ *
+ * The non-temporal prefetch is intended as a prefetch hint that processor will
+ * use the prefetched data only once or short period, unlike the
+ * rte_prefetch0() function which imply that prefetched data to use repeatedly.
+ *
+ * @param p
+ * Address to prefetch
+ */
+static inline void rte_prefetch_non_temporal(const volatile void *p);
+
#endif /* _RTE_PREFETCH_H_ */