From patchwork Tue Nov 17 07:09:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Helin" X-Patchwork-Id: 8953 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id B70C8590C; Tue, 17 Nov 2015 08:09:56 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 07EE858F7 for ; Tue, 17 Nov 2015 08:09:54 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 16 Nov 2015 23:09:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,306,1444719600"; d="scan'208";a="852486511" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 16 Nov 2015 23:09:53 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id tAH79pI8008572; Tue, 17 Nov 2015 15:09:51 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id tAH79mG9032672; Tue, 17 Nov 2015 15:09:50 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tAH79mYv032668; Tue, 17 Nov 2015 15:09:48 +0800 From: Helin Zhang To: dev@dpdk.org Date: Tue, 17 Nov 2015 15:09:47 +0800 Message-Id: <1447744187-32638-1-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 Subject: [dpdk-dev] [PATCH] i40e: skip any phy config as a workaround X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" As firmware does not support any link control from software driver side, any phy config should be ignored as a workaround. Otherwise the link might not be up again after binding back to kernel driver. Signed-off-by: Helin Zhang --- drivers/net/i40e/i40e_ethdev.c | 61 +++++++----------------------------------- 1 file changed, 9 insertions(+), 52 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 2c51a0b..f06c566 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1347,58 +1347,15 @@ i40e_parse_link_speed(uint16_t eth_link_speed) } static int -i40e_phy_conf_link(struct i40e_hw *hw, uint8_t abilities, uint8_t force_speed) -{ - enum i40e_status_code status; - struct i40e_aq_get_phy_abilities_resp phy_ab; - struct i40e_aq_set_phy_config phy_conf; - const uint8_t mask = I40E_AQ_PHY_FLAG_PAUSE_TX | - I40E_AQ_PHY_FLAG_PAUSE_RX | - I40E_AQ_PHY_FLAG_LOW_POWER; - const uint8_t advt = I40E_LINK_SPEED_40GB | - I40E_LINK_SPEED_10GB | - I40E_LINK_SPEED_1GB | - I40E_LINK_SPEED_100MB; - int ret = -ENOTSUP; - - /* Skip it on 40G interfaces, as a workaround for the link issue */ - if (i40e_is_40G_device(hw->device_id)) - return I40E_SUCCESS; - - status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_ab, - NULL); - if (status) - return ret; - - memset(&phy_conf, 0, sizeof(phy_conf)); - - /* bits 0-2 use the values from get_phy_abilities_resp */ - abilities &= ~mask; - abilities |= phy_ab.abilities & mask; - - /* update ablities and speed */ - if (abilities & I40E_AQ_PHY_AN_ENABLED) - phy_conf.link_speed = advt; - else - phy_conf.link_speed = force_speed; - - phy_conf.abilities = abilities; - - /* use get_phy_abilities_resp value for the rest */ - phy_conf.phy_type = phy_ab.phy_type; - phy_conf.eee_capability = phy_ab.eee_capability; - phy_conf.eeer = phy_ab.eeer_val; - phy_conf.low_power_ctrl = phy_ab.d3_lpan; - - PMD_DRV_LOG(DEBUG, "\tCurrent: abilities %x, link_speed %x", - phy_ab.abilities, phy_ab.link_speed); - PMD_DRV_LOG(DEBUG, "\tConfig: abilities %x, link_speed %x", - phy_conf.abilities, phy_conf.link_speed); - - status = i40e_aq_set_phy_config(hw, &phy_conf, NULL); - if (status) - return ret; - +i40e_phy_conf_link(__rte_unused struct i40e_hw *hw, + __rte_unused uint8_t abilities, + __rte_unused uint8_t force_speed) +{ + /* Skip any phy config on both 10G and 40G interfaces, as a workaround + * for the link control limitation of that all link control should be + * handled by firmware. It should follow up if link control will be + * opened to software driver in future firmware versions. + */ return I40E_SUCCESS; }