From patchwork Tue Nov 10 10:02:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ferruh Yigit X-Patchwork-Id: 8821 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id CAA373979; Tue, 10 Nov 2015 11:02:14 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id F1813374D for ; Tue, 10 Nov 2015 11:02:12 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 10 Nov 2015 02:02:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,270,1444719600"; d="scan'208";a="682031856" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga003.jf.intel.com with ESMTP; 10 Nov 2015 02:02:11 -0800 Received: from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com [10.237.217.46]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id tAAA29Bh031229; Tue, 10 Nov 2015 10:02:09 GMT Received: from sivswdev02.ir.intel.com (localhost [127.0.0.1]) by sivswdev02.ir.intel.com with ESMTP id tAAA29Bk014129; Tue, 10 Nov 2015 10:02:09 GMT Received: (from fyigit@localhost) by sivswdev02.ir.intel.com with id tAAA29IR014124; Tue, 10 Nov 2015 10:02:09 GMT From: Ferruh Yigit To: dev@dpdk.org Date: Tue, 10 Nov 2015 10:02:07 +0000 Message-Id: <1447149727-14034-1-git-send-email-ferruh.yigit@intel.com> X-Mailer: git-send-email 1.7.4.1 Subject: [dpdk-dev] [PATCH] eal: add architecture specific rte_cpuflags.c files X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Move cpu_feature_table array from arch specific rte_cpuflags.h files to new arch specific rte_cpuflags.c files. Main motivation is to escape from static variable declarations in header files. cpu_feature_table has many copies in final binary, even exist in some object files that does not use this variable at all. And this can be a sample to create architecture specific source files and move some functions which are not performance sensitive from architecture header files to source files. Signed-off-by: Ferruh Yigit --- lib/librte_eal/bsdapp/eal/Makefile | 6 + lib/librte_eal/bsdapp/eal/rte_eal_version.map | 3 +- lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c | 70 +++++++++++ lib/librte_eal/common/arch/tile/rte_cpuflags.c | 36 ++++++ lib/librte_eal/common/arch/x86/rte_cpuflags.c | 128 +++++++++++++++++++++ .../common/include/arch/ppc_64/rte_cpuflags.h | 39 +------ .../common/include/arch/tile/rte_cpuflags.h | 5 +- .../common/include/arch/x86/rte_cpuflags.h | 96 +--------------- lib/librte_eal/linuxapp/eal/Makefile | 6 + lib/librte_eal/linuxapp/eal/rte_eal_version.map | 3 +- 10 files changed, 256 insertions(+), 136 deletions(-) create mode 100644 lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c create mode 100644 lib/librte_eal/common/arch/tile/rte_cpuflags.c create mode 100644 lib/librte_eal/common/arch/x86/rte_cpuflags.c diff --git a/lib/librte_eal/bsdapp/eal/Makefile b/lib/librte_eal/bsdapp/eal/Makefile index a49dcec..089d066 100644 --- a/lib/librte_eal/bsdapp/eal/Makefile +++ b/lib/librte_eal/bsdapp/eal/Makefile @@ -33,7 +33,9 @@ include $(RTE_SDK)/mk/rte.vars.mk LIB = librte_eal.a +ARCH_DIR ?= $(RTE_ARCH) VPATH += $(RTE_SDK)/lib/librte_eal/common +VPATH += $(RTE_SDK)/lib/librte_eal/common/arch/$(ARCH_DIR) CFLAGS += -I$(SRCDIR)/include CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common @@ -81,6 +83,9 @@ SRCS-$(CONFIG_RTE_LIBRTE_EAL_BSDAPP) += rte_malloc.c SRCS-$(CONFIG_RTE_LIBRTE_EAL_BSDAPP) += malloc_elem.c SRCS-$(CONFIG_RTE_LIBRTE_EAL_BSDAPP) += malloc_heap.c +# from arch dir +SRCS-$(CONFIG_RTE_LIBRTE_EAL_BSDAPP) += rte_cpuflags.c + CFLAGS_eal.o := -D_GNU_SOURCE #CFLAGS_eal_thread.o := -D_GNU_SOURCE CFLAGS_eal_log.o := -D_GNU_SOURCE @@ -99,5 +104,6 @@ SYMLINK-$(CONFIG_RTE_LIBRTE_EAL_BSDAPP)-include/exec-env := \ $(addprefix include/exec-env/,$(INC)) DEPDIRS-$(CONFIG_RTE_LIBRTE_EAL_BSDAPP) += lib/librte_eal/common +DEPDIRS-$(CONFIG_RTE_LIBRTE_EAL_BSDAPP) += lib/librte_eal/common/arch/$(ARCH_DIR) include $(RTE_SDK)/mk/rte.lib.mk diff --git a/lib/librte_eal/bsdapp/eal/rte_eal_version.map b/lib/librte_eal/bsdapp/eal/rte_eal_version.map index 8b00761..a07626e 100644 --- a/lib/librte_eal/bsdapp/eal/rte_eal_version.map +++ b/lib/librte_eal/bsdapp/eal/rte_eal_version.map @@ -130,5 +130,6 @@ DPDK_2.2 { global: rte_intr_cap_multiple; + cpu_feature_table; -} DPDK_2.1; \ No newline at end of file +} DPDK_2.1; diff --git a/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c new file mode 100644 index 0000000..c5c7ec0 --- /dev/null +++ b/lib/librte_eal/common/arch/ppc_64/rte_cpuflags.c @@ -0,0 +1,70 @@ +/* + * BSD LICENSE + * + * Copyright (C) IBM Corporation 2014. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of IBM Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#include "rte_cpuflags.h" + +const struct feature_entry cpu_feature_table[] = { + FEAT_DEF(PPC_LE, 0x00000001, 0, REG_HWCAP, 0) + FEAT_DEF(TRUE_LE, 0x00000001, 0, REG_HWCAP, 1) + FEAT_DEF(PSERIES_PERFMON_COMPAT, 0x00000001, 0, REG_HWCAP, 6) + FEAT_DEF(VSX, 0x00000001, 0, REG_HWCAP, 7) + FEAT_DEF(ARCH_2_06, 0x00000001, 0, REG_HWCAP, 8) + FEAT_DEF(POWER6_EXT, 0x00000001, 0, REG_HWCAP, 9) + FEAT_DEF(DFP, 0x00000001, 0, REG_HWCAP, 10) + FEAT_DEF(PA6T, 0x00000001, 0, REG_HWCAP, 11) + FEAT_DEF(ARCH_2_05, 0x00000001, 0, REG_HWCAP, 12) + FEAT_DEF(ICACHE_SNOOP, 0x00000001, 0, REG_HWCAP, 13) + FEAT_DEF(SMT, 0x00000001, 0, REG_HWCAP, 14) + FEAT_DEF(BOOKE, 0x00000001, 0, REG_HWCAP, 15) + FEAT_DEF(CELLBE, 0x00000001, 0, REG_HWCAP, 16) + FEAT_DEF(POWER5_PLUS, 0x00000001, 0, REG_HWCAP, 17) + FEAT_DEF(POWER5, 0x00000001, 0, REG_HWCAP, 18) + FEAT_DEF(POWER4, 0x00000001, 0, REG_HWCAP, 19) + FEAT_DEF(NOTB, 0x00000001, 0, REG_HWCAP, 20) + FEAT_DEF(EFP_DOUBLE, 0x00000001, 0, REG_HWCAP, 21) + FEAT_DEF(EFP_SINGLE, 0x00000001, 0, REG_HWCAP, 22) + FEAT_DEF(SPE, 0x00000001, 0, REG_HWCAP, 23) + FEAT_DEF(UNIFIED_CACHE, 0x00000001, 0, REG_HWCAP, 24) + FEAT_DEF(4xxMAC, 0x00000001, 0, REG_HWCAP, 25) + FEAT_DEF(MMU, 0x00000001, 0, REG_HWCAP, 26) + FEAT_DEF(FPU, 0x00000001, 0, REG_HWCAP, 27) + FEAT_DEF(ALTIVEC, 0x00000001, 0, REG_HWCAP, 28) + FEAT_DEF(PPC601, 0x00000001, 0, REG_HWCAP, 29) + FEAT_DEF(PPC64, 0x00000001, 0, REG_HWCAP, 30) + FEAT_DEF(PPC32, 0x00000001, 0, REG_HWCAP, 31) + FEAT_DEF(TAR, 0x00000001, 0, REG_HWCAP2, 26) + FEAT_DEF(LSEL, 0x00000001, 0, REG_HWCAP2, 27) + FEAT_DEF(EBB, 0x00000001, 0, REG_HWCAP2, 28) + FEAT_DEF(DSCR, 0x00000001, 0, REG_HWCAP2, 29) + FEAT_DEF(HTM, 0x00000001, 0, REG_HWCAP2, 30) + FEAT_DEF(ARCH_2_07, 0x00000001, 0, REG_HWCAP2, 31) +}; diff --git a/lib/librte_eal/common/arch/tile/rte_cpuflags.c b/lib/librte_eal/common/arch/tile/rte_cpuflags.c new file mode 100644 index 0000000..6c80b4a --- /dev/null +++ b/lib/librte_eal/common/arch/tile/rte_cpuflags.c @@ -0,0 +1,36 @@ +/* + * BSD LICENSE + * + * Copyright (C) EZchip Semiconductor Ltd. 2015. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of EZchip Semiconductor nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#include "rte_cpuflags.h" + +const struct feature_entry cpu_feature_table[] = { +}; diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c new file mode 100644 index 0000000..f0a6662 --- /dev/null +++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c @@ -0,0 +1,128 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2010-2015 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "rte_cpuflags.h" + +const struct feature_entry cpu_feature_table[] = { + FEAT_DEF(SSE3, 0x00000001, 0, RTE_REG_ECX, 0) + FEAT_DEF(PCLMULQDQ, 0x00000001, 0, RTE_REG_ECX, 1) + FEAT_DEF(DTES64, 0x00000001, 0, RTE_REG_ECX, 2) + FEAT_DEF(MONITOR, 0x00000001, 0, RTE_REG_ECX, 3) + FEAT_DEF(DS_CPL, 0x00000001, 0, RTE_REG_ECX, 4) + FEAT_DEF(VMX, 0x00000001, 0, RTE_REG_ECX, 5) + FEAT_DEF(SMX, 0x00000001, 0, RTE_REG_ECX, 6) + FEAT_DEF(EIST, 0x00000001, 0, RTE_REG_ECX, 7) + FEAT_DEF(TM2, 0x00000001, 0, RTE_REG_ECX, 8) + FEAT_DEF(SSSE3, 0x00000001, 0, RTE_REG_ECX, 9) + FEAT_DEF(CNXT_ID, 0x00000001, 0, RTE_REG_ECX, 10) + FEAT_DEF(FMA, 0x00000001, 0, RTE_REG_ECX, 12) + FEAT_DEF(CMPXCHG16B, 0x00000001, 0, RTE_REG_ECX, 13) + FEAT_DEF(XTPR, 0x00000001, 0, RTE_REG_ECX, 14) + FEAT_DEF(PDCM, 0x00000001, 0, RTE_REG_ECX, 15) + FEAT_DEF(PCID, 0x00000001, 0, RTE_REG_ECX, 17) + FEAT_DEF(DCA, 0x00000001, 0, RTE_REG_ECX, 18) + FEAT_DEF(SSE4_1, 0x00000001, 0, RTE_REG_ECX, 19) + FEAT_DEF(SSE4_2, 0x00000001, 0, RTE_REG_ECX, 20) + FEAT_DEF(X2APIC, 0x00000001, 0, RTE_REG_ECX, 21) + FEAT_DEF(MOVBE, 0x00000001, 0, RTE_REG_ECX, 22) + FEAT_DEF(POPCNT, 0x00000001, 0, RTE_REG_ECX, 23) + FEAT_DEF(TSC_DEADLINE, 0x00000001, 0, RTE_REG_ECX, 24) + FEAT_DEF(AES, 0x00000001, 0, RTE_REG_ECX, 25) + FEAT_DEF(XSAVE, 0x00000001, 0, RTE_REG_ECX, 26) + FEAT_DEF(OSXSAVE, 0x00000001, 0, RTE_REG_ECX, 27) + FEAT_DEF(AVX, 0x00000001, 0, RTE_REG_ECX, 28) + FEAT_DEF(F16C, 0x00000001, 0, RTE_REG_ECX, 29) + FEAT_DEF(RDRAND, 0x00000001, 0, RTE_REG_ECX, 30) + + FEAT_DEF(FPU, 0x00000001, 0, RTE_REG_EDX, 0) + FEAT_DEF(VME, 0x00000001, 0, RTE_REG_EDX, 1) + FEAT_DEF(DE, 0x00000001, 0, RTE_REG_EDX, 2) + FEAT_DEF(PSE, 0x00000001, 0, RTE_REG_EDX, 3) + FEAT_DEF(TSC, 0x00000001, 0, RTE_REG_EDX, 4) + FEAT_DEF(MSR, 0x00000001, 0, RTE_REG_EDX, 5) + FEAT_DEF(PAE, 0x00000001, 0, RTE_REG_EDX, 6) + FEAT_DEF(MCE, 0x00000001, 0, RTE_REG_EDX, 7) + FEAT_DEF(CX8, 0x00000001, 0, RTE_REG_EDX, 8) + FEAT_DEF(APIC, 0x00000001, 0, RTE_REG_EDX, 9) + FEAT_DEF(SEP, 0x00000001, 0, RTE_REG_EDX, 11) + FEAT_DEF(MTRR, 0x00000001, 0, RTE_REG_EDX, 12) + FEAT_DEF(PGE, 0x00000001, 0, RTE_REG_EDX, 13) + FEAT_DEF(MCA, 0x00000001, 0, RTE_REG_EDX, 14) + FEAT_DEF(CMOV, 0x00000001, 0, RTE_REG_EDX, 15) + FEAT_DEF(PAT, 0x00000001, 0, RTE_REG_EDX, 16) + FEAT_DEF(PSE36, 0x00000001, 0, RTE_REG_EDX, 17) + FEAT_DEF(PSN, 0x00000001, 0, RTE_REG_EDX, 18) + FEAT_DEF(CLFSH, 0x00000001, 0, RTE_REG_EDX, 19) + FEAT_DEF(DS, 0x00000001, 0, RTE_REG_EDX, 21) + FEAT_DEF(ACPI, 0x00000001, 0, RTE_REG_EDX, 22) + FEAT_DEF(MMX, 0x00000001, 0, RTE_REG_EDX, 23) + FEAT_DEF(FXSR, 0x00000001, 0, RTE_REG_EDX, 24) + FEAT_DEF(SSE, 0x00000001, 0, RTE_REG_EDX, 25) + FEAT_DEF(SSE2, 0x00000001, 0, RTE_REG_EDX, 26) + FEAT_DEF(SS, 0x00000001, 0, RTE_REG_EDX, 27) + FEAT_DEF(HTT, 0x00000001, 0, RTE_REG_EDX, 28) + FEAT_DEF(TM, 0x00000001, 0, RTE_REG_EDX, 29) + FEAT_DEF(PBE, 0x00000001, 0, RTE_REG_EDX, 31) + + FEAT_DEF(DIGTEMP, 0x00000006, 0, RTE_REG_EAX, 0) + FEAT_DEF(TRBOBST, 0x00000006, 0, RTE_REG_EAX, 1) + FEAT_DEF(ARAT, 0x00000006, 0, RTE_REG_EAX, 2) + FEAT_DEF(PLN, 0x00000006, 0, RTE_REG_EAX, 4) + FEAT_DEF(ECMD, 0x00000006, 0, RTE_REG_EAX, 5) + FEAT_DEF(PTM, 0x00000006, 0, RTE_REG_EAX, 6) + + FEAT_DEF(MPERF_APERF_MSR, 0x00000006, 0, RTE_REG_ECX, 0) + FEAT_DEF(ACNT2, 0x00000006, 0, RTE_REG_ECX, 1) + FEAT_DEF(ENERGY_EFF, 0x00000006, 0, RTE_REG_ECX, 3) + + FEAT_DEF(FSGSBASE, 0x00000007, 0, RTE_REG_EBX, 0) + FEAT_DEF(BMI1, 0x00000007, 0, RTE_REG_EBX, 2) + FEAT_DEF(HLE, 0x00000007, 0, RTE_REG_EBX, 4) + FEAT_DEF(AVX2, 0x00000007, 0, RTE_REG_EBX, 5) + FEAT_DEF(SMEP, 0x00000007, 0, RTE_REG_EBX, 6) + FEAT_DEF(BMI2, 0x00000007, 0, RTE_REG_EBX, 7) + FEAT_DEF(ERMS, 0x00000007, 0, RTE_REG_EBX, 8) + FEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10) + FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11) + + FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0) + FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4) + + FEAT_DEF(SYSCALL, 0x80000001, 0, RTE_REG_EDX, 11) + FEAT_DEF(XD, 0x80000001, 0, RTE_REG_EDX, 20) + FEAT_DEF(1GB_PG, 0x80000001, 0, RTE_REG_EDX, 26) + FEAT_DEF(RDTSCP, 0x80000001, 0, RTE_REG_EDX, 27) + FEAT_DEF(EM64T, 0x80000001, 0, RTE_REG_EDX, 29) + + FEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX, 8) +}; diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h index f1cfc4f..478f68f 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_cpuflags.h @@ -44,6 +44,8 @@ extern "C" { #include "generic/rte_cpuflags.h" +extern const struct feature_entry cpu_feature_table[]; + /* Symbolic values for the entries in the auxiliary table */ #define AT_HWCAP 16 #define AT_HWCAP2 26 @@ -96,43 +98,6 @@ enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE { RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */ }; -static const struct feature_entry cpu_feature_table[] = { - FEAT_DEF(PPC_LE, 0x00000001, 0, REG_HWCAP, 0) - FEAT_DEF(TRUE_LE, 0x00000001, 0, REG_HWCAP, 1) - FEAT_DEF(PSERIES_PERFMON_COMPAT, 0x00000001, 0, REG_HWCAP, 6) - FEAT_DEF(VSX, 0x00000001, 0, REG_HWCAP, 7) - FEAT_DEF(ARCH_2_06, 0x00000001, 0, REG_HWCAP, 8) - FEAT_DEF(POWER6_EXT, 0x00000001, 0, REG_HWCAP, 9) - FEAT_DEF(DFP, 0x00000001, 0, REG_HWCAP, 10) - FEAT_DEF(PA6T, 0x00000001, 0, REG_HWCAP, 11) - FEAT_DEF(ARCH_2_05, 0x00000001, 0, REG_HWCAP, 12) - FEAT_DEF(ICACHE_SNOOP, 0x00000001, 0, REG_HWCAP, 13) - FEAT_DEF(SMT, 0x00000001, 0, REG_HWCAP, 14) - FEAT_DEF(BOOKE, 0x00000001, 0, REG_HWCAP, 15) - FEAT_DEF(CELLBE, 0x00000001, 0, REG_HWCAP, 16) - FEAT_DEF(POWER5_PLUS, 0x00000001, 0, REG_HWCAP, 17) - FEAT_DEF(POWER5, 0x00000001, 0, REG_HWCAP, 18) - FEAT_DEF(POWER4, 0x00000001, 0, REG_HWCAP, 19) - FEAT_DEF(NOTB, 0x00000001, 0, REG_HWCAP, 20) - FEAT_DEF(EFP_DOUBLE, 0x00000001, 0, REG_HWCAP, 21) - FEAT_DEF(EFP_SINGLE, 0x00000001, 0, REG_HWCAP, 22) - FEAT_DEF(SPE, 0x00000001, 0, REG_HWCAP, 23) - FEAT_DEF(UNIFIED_CACHE, 0x00000001, 0, REG_HWCAP, 24) - FEAT_DEF(4xxMAC, 0x00000001, 0, REG_HWCAP, 25) - FEAT_DEF(MMU, 0x00000001, 0, REG_HWCAP, 26) - FEAT_DEF(FPU, 0x00000001, 0, REG_HWCAP, 27) - FEAT_DEF(ALTIVEC, 0x00000001, 0, REG_HWCAP, 28) - FEAT_DEF(PPC601, 0x00000001, 0, REG_HWCAP, 29) - FEAT_DEF(PPC64, 0x00000001, 0, REG_HWCAP, 30) - FEAT_DEF(PPC32, 0x00000001, 0, REG_HWCAP, 31) - FEAT_DEF(TAR, 0x00000001, 0, REG_HWCAP2, 26) - FEAT_DEF(LSEL, 0x00000001, 0, REG_HWCAP2, 27) - FEAT_DEF(EBB, 0x00000001, 0, REG_HWCAP2, 28) - FEAT_DEF(DSCR, 0x00000001, 0, REG_HWCAP2, 29) - FEAT_DEF(HTM, 0x00000001, 0, REG_HWCAP2, 30) - FEAT_DEF(ARCH_2_07, 0x00000001, 0, REG_HWCAP2, 31) -}; - /* * Read AUXV software register and get cpu features for Power */ diff --git a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h index d6696d3..8361c01 100644 --- a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h @@ -44,6 +44,8 @@ extern "C" { #include "generic/rte_cpuflags.h" +extern const struct feature_entry cpu_feature_table[]; + /* software based registers */ enum cpu_register_t __RTE_REGISTER_UNDERLYING_TYPE { REG_DUMMY = 0 @@ -56,9 +58,6 @@ enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE { RTE_CPUFLAG_NUMFLAGS /**< This should always be the last! */ }; -static const struct feature_entry cpu_feature_table[] = { -}; - /* * Read AUXV software register and get cpu features for Power */ diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h index df1834c..576d7e3 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h @@ -45,6 +45,8 @@ extern "C" { #include "generic/rte_cpuflags.h" +extern const struct feature_entry cpu_feature_table[]; + enum rte_cpu_flag_t __RTE_CPUFLAG_UNDERLYING_TYPE { /* (EAX 01h) ECX features*/ RTE_CPUFLAG_SSE3 = 0, /**< SSE3 */ @@ -157,100 +159,6 @@ enum cpu_register_t __RTE_REGISTER_UNDERLYING_TYPE { RTE_REG_EDX, }; -static const struct feature_entry cpu_feature_table[] = { - FEAT_DEF(SSE3, 0x00000001, 0, RTE_REG_ECX, 0) - FEAT_DEF(PCLMULQDQ, 0x00000001, 0, RTE_REG_ECX, 1) - FEAT_DEF(DTES64, 0x00000001, 0, RTE_REG_ECX, 2) - FEAT_DEF(MONITOR, 0x00000001, 0, RTE_REG_ECX, 3) - FEAT_DEF(DS_CPL, 0x00000001, 0, RTE_REG_ECX, 4) - FEAT_DEF(VMX, 0x00000001, 0, RTE_REG_ECX, 5) - FEAT_DEF(SMX, 0x00000001, 0, RTE_REG_ECX, 6) - FEAT_DEF(EIST, 0x00000001, 0, RTE_REG_ECX, 7) - FEAT_DEF(TM2, 0x00000001, 0, RTE_REG_ECX, 8) - FEAT_DEF(SSSE3, 0x00000001, 0, RTE_REG_ECX, 9) - FEAT_DEF(CNXT_ID, 0x00000001, 0, RTE_REG_ECX, 10) - FEAT_DEF(FMA, 0x00000001, 0, RTE_REG_ECX, 12) - FEAT_DEF(CMPXCHG16B, 0x00000001, 0, RTE_REG_ECX, 13) - FEAT_DEF(XTPR, 0x00000001, 0, RTE_REG_ECX, 14) - FEAT_DEF(PDCM, 0x00000001, 0, RTE_REG_ECX, 15) - FEAT_DEF(PCID, 0x00000001, 0, RTE_REG_ECX, 17) - FEAT_DEF(DCA, 0x00000001, 0, RTE_REG_ECX, 18) - FEAT_DEF(SSE4_1, 0x00000001, 0, RTE_REG_ECX, 19) - FEAT_DEF(SSE4_2, 0x00000001, 0, RTE_REG_ECX, 20) - FEAT_DEF(X2APIC, 0x00000001, 0, RTE_REG_ECX, 21) - FEAT_DEF(MOVBE, 0x00000001, 0, RTE_REG_ECX, 22) - FEAT_DEF(POPCNT, 0x00000001, 0, RTE_REG_ECX, 23) - FEAT_DEF(TSC_DEADLINE, 0x00000001, 0, RTE_REG_ECX, 24) - FEAT_DEF(AES, 0x00000001, 0, RTE_REG_ECX, 25) - FEAT_DEF(XSAVE, 0x00000001, 0, RTE_REG_ECX, 26) - FEAT_DEF(OSXSAVE, 0x00000001, 0, RTE_REG_ECX, 27) - FEAT_DEF(AVX, 0x00000001, 0, RTE_REG_ECX, 28) - FEAT_DEF(F16C, 0x00000001, 0, RTE_REG_ECX, 29) - FEAT_DEF(RDRAND, 0x00000001, 0, RTE_REG_ECX, 30) - - FEAT_DEF(FPU, 0x00000001, 0, RTE_REG_EDX, 0) - FEAT_DEF(VME, 0x00000001, 0, RTE_REG_EDX, 1) - FEAT_DEF(DE, 0x00000001, 0, RTE_REG_EDX, 2) - FEAT_DEF(PSE, 0x00000001, 0, RTE_REG_EDX, 3) - FEAT_DEF(TSC, 0x00000001, 0, RTE_REG_EDX, 4) - FEAT_DEF(MSR, 0x00000001, 0, RTE_REG_EDX, 5) - FEAT_DEF(PAE, 0x00000001, 0, RTE_REG_EDX, 6) - FEAT_DEF(MCE, 0x00000001, 0, RTE_REG_EDX, 7) - FEAT_DEF(CX8, 0x00000001, 0, RTE_REG_EDX, 8) - FEAT_DEF(APIC, 0x00000001, 0, RTE_REG_EDX, 9) - FEAT_DEF(SEP, 0x00000001, 0, RTE_REG_EDX, 11) - FEAT_DEF(MTRR, 0x00000001, 0, RTE_REG_EDX, 12) - FEAT_DEF(PGE, 0x00000001, 0, RTE_REG_EDX, 13) - FEAT_DEF(MCA, 0x00000001, 0, RTE_REG_EDX, 14) - FEAT_DEF(CMOV, 0x00000001, 0, RTE_REG_EDX, 15) - FEAT_DEF(PAT, 0x00000001, 0, RTE_REG_EDX, 16) - FEAT_DEF(PSE36, 0x00000001, 0, RTE_REG_EDX, 17) - FEAT_DEF(PSN, 0x00000001, 0, RTE_REG_EDX, 18) - FEAT_DEF(CLFSH, 0x00000001, 0, RTE_REG_EDX, 19) - FEAT_DEF(DS, 0x00000001, 0, RTE_REG_EDX, 21) - FEAT_DEF(ACPI, 0x00000001, 0, RTE_REG_EDX, 22) - FEAT_DEF(MMX, 0x00000001, 0, RTE_REG_EDX, 23) - FEAT_DEF(FXSR, 0x00000001, 0, RTE_REG_EDX, 24) - FEAT_DEF(SSE, 0x00000001, 0, RTE_REG_EDX, 25) - FEAT_DEF(SSE2, 0x00000001, 0, RTE_REG_EDX, 26) - FEAT_DEF(SS, 0x00000001, 0, RTE_REG_EDX, 27) - FEAT_DEF(HTT, 0x00000001, 0, RTE_REG_EDX, 28) - FEAT_DEF(TM, 0x00000001, 0, RTE_REG_EDX, 29) - FEAT_DEF(PBE, 0x00000001, 0, RTE_REG_EDX, 31) - - FEAT_DEF(DIGTEMP, 0x00000006, 0, RTE_REG_EAX, 0) - FEAT_DEF(TRBOBST, 0x00000006, 0, RTE_REG_EAX, 1) - FEAT_DEF(ARAT, 0x00000006, 0, RTE_REG_EAX, 2) - FEAT_DEF(PLN, 0x00000006, 0, RTE_REG_EAX, 4) - FEAT_DEF(ECMD, 0x00000006, 0, RTE_REG_EAX, 5) - FEAT_DEF(PTM, 0x00000006, 0, RTE_REG_EAX, 6) - - FEAT_DEF(MPERF_APERF_MSR, 0x00000006, 0, RTE_REG_ECX, 0) - FEAT_DEF(ACNT2, 0x00000006, 0, RTE_REG_ECX, 1) - FEAT_DEF(ENERGY_EFF, 0x00000006, 0, RTE_REG_ECX, 3) - - FEAT_DEF(FSGSBASE, 0x00000007, 0, RTE_REG_EBX, 0) - FEAT_DEF(BMI1, 0x00000007, 0, RTE_REG_EBX, 2) - FEAT_DEF(HLE, 0x00000007, 0, RTE_REG_EBX, 4) - FEAT_DEF(AVX2, 0x00000007, 0, RTE_REG_EBX, 5) - FEAT_DEF(SMEP, 0x00000007, 0, RTE_REG_EBX, 6) - FEAT_DEF(BMI2, 0x00000007, 0, RTE_REG_EBX, 7) - FEAT_DEF(ERMS, 0x00000007, 0, RTE_REG_EBX, 8) - FEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10) - FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11) - - FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0) - FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4) - - FEAT_DEF(SYSCALL, 0x80000001, 0, RTE_REG_EDX, 11) - FEAT_DEF(XD, 0x80000001, 0, RTE_REG_EDX, 20) - FEAT_DEF(1GB_PG, 0x80000001, 0, RTE_REG_EDX, 26) - FEAT_DEF(RDTSCP, 0x80000001, 0, RTE_REG_EDX, 27) - FEAT_DEF(EM64T, 0x80000001, 0, RTE_REG_EDX, 29) - - FEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX, 8) -}; - static inline void rte_cpu_get_features(uint32_t leaf, uint32_t subleaf, cpuid_registers_t out) { diff --git a/lib/librte_eal/linuxapp/eal/Makefile b/lib/librte_eal/linuxapp/eal/Makefile index 7e36b86..0902c83 100644 --- a/lib/librte_eal/linuxapp/eal/Makefile +++ b/lib/librte_eal/linuxapp/eal/Makefile @@ -37,7 +37,9 @@ EXPORT_MAP := rte_eal_version.map LIBABIVER := 2 +ARCH_DIR ?= $(RTE_ARCH) VPATH += $(RTE_SDK)/lib/librte_eal/common +VPATH += $(RTE_SDK)/lib/librte_eal/common/arch/$(ARCH_DIR) CFLAGS += -I$(SRCDIR)/include CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common @@ -91,6 +93,9 @@ SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += rte_malloc.c SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += malloc_elem.c SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += malloc_heap.c +# from arch dir +SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += rte_cpuflags.c + CFLAGS_eal.o := -D_GNU_SOURCE CFLAGS_eal_interrupts.o := -D_GNU_SOURCE CFLAGS_eal_pci_vfio_mp_sync.o := -D_GNU_SOURCE @@ -120,5 +125,6 @@ SYMLINK-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP)-include/exec-env := \ $(addprefix include/exec-env/,$(INC)) DEPDIRS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += lib/librte_eal/common +DEPDIRS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += lib/librte_eal/common/arch/$(ARCH_DIR) include $(RTE_SDK)/mk/rte.lib.mk diff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map b/lib/librte_eal/linuxapp/eal/rte_eal_version.map index cb9f4d6..741a74b 100644 --- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map +++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map @@ -133,5 +133,6 @@ DPDK_2.2 { global: rte_intr_cap_multiple; + cpu_feature_table; -} DPDK_2.1; \ No newline at end of file +} DPDK_2.1;