From patchwork Mon Nov 9 02:45:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Helin" X-Patchwork-Id: 8782 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 4A621590C; Mon, 9 Nov 2015 03:46:12 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 04D3B11F5 for ; Mon, 9 Nov 2015 03:46:09 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 08 Nov 2015 18:46:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,264,1444719600"; d="scan'208";a="681100367" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga003.jf.intel.com with ESMTP; 08 Nov 2015 18:46:08 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id tA92k6iV025870; Mon, 9 Nov 2015 10:46:06 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id tA92k3EF026588; Mon, 9 Nov 2015 10:46:05 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tA92k33J026584; Mon, 9 Nov 2015 10:46:03 +0800 From: Helin Zhang To: dev@dpdk.org Date: Mon, 9 Nov 2015 10:45:58 +0800 Message-Id: <1447037159-26544-2-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1447037159-26544-1-git-send-email-helin.zhang@intel.com> References: <1446796116-1219-1-git-send-email-helin.zhang@intel.com> <1447037159-26544-1-git-send-email-helin.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 1/2] i40e: fix ICC compile issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" It fixes compile issue on ICC 13.0.0. Error logs: i40e_ethdev.c(7943): error #188: enumerated type mixed with another type PMD_INIT_LOG(ERR, Signed-off-by: Helin Zhang --- drivers/net/i40e/i40e_ethdev.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-) v2 changes: Corrected the variable/function type, to replace casting. diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index ddf3d38..30fb106 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -3418,7 +3418,7 @@ bitmap_is_subset(uint8_t src1, uint8_t src2) return !((src1 ^ src2) & src2); } -static int +static enum i40e_status_code validate_tcmap_parameter(struct i40e_vsi *vsi, uint8_t enabled_tcmap) { struct i40e_hw *hw = I40E_VSI_TO_HW(vsi); @@ -3426,14 +3426,14 @@ validate_tcmap_parameter(struct i40e_vsi *vsi, uint8_t enabled_tcmap) /* If DCB is not supported, only default TC is supported */ if (!hw->func_caps.dcb && enabled_tcmap != I40E_DEFAULT_TCMAP) { PMD_DRV_LOG(ERR, "DCB is not enabled, only TC0 is supported"); - return -EINVAL; + return I40E_NOT_SUPPORTED; } if (!bitmap_is_subset(hw->func_caps.enabled_tcmap, enabled_tcmap)) { PMD_DRV_LOG(ERR, "Enabled TC map 0x%x not applicable to " "HW support 0x%x", hw->func_caps.enabled_tcmap, enabled_tcmap); - return -EINVAL; + return I40E_NOT_SUPPORTED; } return I40E_SUCCESS; } @@ -3518,12 +3518,13 @@ i40e_vsi_update_tc_bandwidth(struct i40e_vsi *vsi, uint8_t enabled_tcmap) return I40E_SUCCESS; } -static int +static enum i40e_status_code i40e_vsi_config_tc_queue_mapping(struct i40e_vsi *vsi, struct i40e_aqc_vsi_properties_data *info, uint8_t enabled_tcmap) { - int ret, i, total_tc = 0; + enum i40e_status_code ret; + int i, total_tc = 0; uint16_t qpnum_per_tc, bsf, qp_idx; ret = validate_tcmap_parameter(vsi, enabled_tcmap); @@ -7928,13 +7929,14 @@ i40e_parse_dcb_configure(struct rte_eth_dev *dev, * * Returns 0 on success, negative value on failure */ -static int +static enum i40e_status_code i40e_vsi_get_bw_info(struct i40e_vsi *vsi) { struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; struct i40e_hw *hw = I40E_VSI_TO_HW(vsi); - int i, ret; + enum i40e_status_code ret; + int i; uint32_t tc_bw_max; /* Get the VSI level BW configuration */ @@ -7944,7 +7946,7 @@ i40e_vsi_get_bw_info(struct i40e_vsi *vsi) "couldn't get PF vsi bw config, err %s aq_err %s\n", i40e_stat_str(hw, ret), i40e_aq_str(hw, hw->aq.asq_last_status)); - return -EINVAL; + return ret; } /* Get the VSI level BW configuration per TC */ @@ -7955,7 +7957,7 @@ i40e_vsi_get_bw_info(struct i40e_vsi *vsi) "couldn't get PF vsi ets bw config, err %s aq_err %s\n", i40e_stat_str(hw, ret), i40e_aq_str(hw, hw->aq.asq_last_status)); - return -EINVAL; + return ret; } if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { @@ -7983,15 +7985,16 @@ i40e_vsi_get_bw_info(struct i40e_vsi *vsi) __func__, vsi->seid, i, bw_config.qs_handles[i]); } - return 0; + return ret; } -static int +static enum i40e_status_code i40e_vsi_update_queue_mapping(struct i40e_vsi *vsi, struct i40e_aqc_vsi_properties_data *info, uint8_t enabled_tcmap) { - int ret, i, total_tc = 0; + enum i40e_status_code ret; + int i, total_tc = 0; uint16_t qpnum_per_tc, bsf, qp_idx; struct rte_eth_dev_data *dev_data = I40E_VSI_TO_DEV_DATA(vsi); @@ -8058,13 +8061,13 @@ i40e_vsi_update_queue_mapping(struct i40e_vsi *vsi, * * Returns 0 on success, negative value on failure */ -static int +static enum i40e_status_code i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 tc_map) { struct i40e_aqc_configure_vsi_tc_bw_data bw_data; struct i40e_vsi_context ctxt; struct i40e_hw *hw = I40E_VSI_TO_HW(vsi); - int ret = 0; + enum i40e_status_code ret = I40E_SUCCESS; int i; /* Check if enabled_tc is same as existing or new TCs */ @@ -8150,7 +8153,8 @@ i40e_dcb_hw_configure(struct i40e_pf *pf, struct i40e_dcbx_config *old_cfg = &hw->local_dcbx_config; struct i40e_vsi *main_vsi = pf->main_vsi; struct i40e_vsi_list *vsi_list; - int i, ret; + enum i40e_status_code ret; + int i; uint32_t val; /* Use the FW API if FW > v4.4*/