From patchwork Wed Nov 4 08:45:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cunming Liang X-Patchwork-Id: 8647 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 6F96491B3; Wed, 4 Nov 2015 09:45:56 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 7447B91AC for ; Wed, 4 Nov 2015 09:45:54 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 04 Nov 2015 00:45:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,242,1444719600"; d="scan'208";a="826650299" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga001.fm.intel.com with ESMTP; 04 Nov 2015 00:45:55 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id tA48jo4Y004397; Wed, 4 Nov 2015 16:45:50 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id tA48jkOS028889; Wed, 4 Nov 2015 16:45:48 +0800 Received: (from cliang18@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tA48jkvb028885; Wed, 4 Nov 2015 16:45:46 +0800 From: Cunming Liang To: dev@dpdk.org Date: Wed, 4 Nov 2015 16:45:29 +0800 Message-Id: <1446626740-28824-3-git-send-email-cunming.liang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1446626740-28824-1-git-send-email-cunming.liang@intel.com> References: <1446617263-7448-1-git-send-email-cunming.liang@intel.com> <1446626740-28824-1-git-send-email-cunming.liang@intel.com> Subject: [dpdk-dev] [PATCH v4 02/13] ixgbe: reserve intr vector zero for misc cause X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" According to the VFIO interrupt mapping, the interrupt vector id for rxq starts from RX_VEC_START. It doesn't impact the UIO cases. v3 changes: - macro renaming according to the EAL change Signed-off-by: Cunming Liang --- drivers/net/ixgbe/ixgbe_ethdev.c | 22 ++++++++++++++-------- drivers/net/ixgbe/ixgbe_ethdev.h | 3 +++ 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 25966ef..153ba98 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -4478,7 +4478,8 @@ ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS); - mask |= (1 << queue_id); + mask |= (1 << IXGBE_MISC_VEC_ID); + RTE_SET_USED(queue_id); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); rte_intr_enable(&dev->pci_dev->intr_handle); @@ -4494,7 +4495,8 @@ ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS); - mask &= ~(1 << queue_id); + mask &= ~(1 << IXGBE_MISC_VEC_ID); + RTE_SET_USED(queue_id); IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); return 0; @@ -4630,7 +4632,7 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev) struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); uint32_t q_idx; - uint32_t vector_idx = 0; + uint32_t vector_idx = IXGBE_MISC_VEC_ID; /* won't configure msix register if no mapping is done * between intr vector and event fd. @@ -4662,7 +4664,8 @@ ixgbe_configure_msix(struct rte_eth_dev *dev) struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle; struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint32_t queue_id, vec = 0; + uint32_t queue_id, base = IXGBE_MISC_VEC_ID; + uint32_t vec = IXGBE_MISC_VEC_ID; uint32_t mask; uint32_t gpie; @@ -4672,6 +4675,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev) if (!rte_intr_dp_is_en(intr_handle)) return; + if (rte_intr_allow_others(intr_handle)) + vec = base = IXGBE_RX_VEC_START; + /* setup GPIE for MSI-x mode */ gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); gpie |= IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT | @@ -4695,23 +4701,23 @@ ixgbe_configure_msix(struct rte_eth_dev *dev) /* by default, 1:1 mapping */ ixgbe_set_ivar_map(hw, 0, queue_id, vec); intr_handle->intr_vec[queue_id] = vec; - if (vec < intr_handle->nb_efd - 1) + if (vec < base + intr_handle->nb_efd - 1) vec++; } switch (hw->mac.type) { case ixgbe_mac_82598EB: ixgbe_set_ivar_map(hw, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX, - intr_handle->max_intr - 1); + IXGBE_MISC_VEC_ID); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: - ixgbe_set_ivar_map(hw, -1, 1, intr_handle->max_intr - 1); + ixgbe_set_ivar_map(hw, -1, 1, IXGBE_MISC_VEC_ID); break; default: break; } - IXGBE_WRITE_REG(hw, IXGBE_EITR(queue_id), + IXGBE_WRITE_REG(hw, IXGBE_EITR(IXGBE_MISC_VEC_ID), IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF); /* set up to autoclear timer, and the vectors */ diff --git a/drivers/net/ixgbe/ixgbe_ethdev.h b/drivers/net/ixgbe/ixgbe_ethdev.h index 569d678..1856c42 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.h +++ b/drivers/net/ixgbe/ixgbe_ethdev.h @@ -123,6 +123,9 @@ #define IXGBE_VF_IRQ_ENABLE_MASK 3 /* vf irq enable mask */ #define IXGBE_VF_MAXMSIVECTOR 1 +#define IXGBE_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET +#define IXGBE_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET + /* * Information about the fdir mode. */