[dpdk-dev,4/4] bnx2x: enable PMD build
Commit Message
From: Stephen Hemminger <shemming@brocade.com>
This is build infrastructure changes for bnx2x driver.
- enable BNX2X poll mode driver in default config.
- add it to mk
- put entry in MAINTAINERS
Note: I intentionally did not list myself as maintainer of this
driver. QLogic has discussed taking over as maintainer.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
---
v3 -- Add additional PCI'ids reported by QLogic
Fix reference to QLogic in id's file
---
MAINTAINERS | 3 ++
config/common_linuxapp | 10 +++++
drivers/net/Makefile | 1 +
drivers/net/bnx2x/Makefile | 28 ++++++++++++++
lib/librte_eal/common/include/rte_pci_dev_ids.h | 49 +++++++++++++++++++++++++
mk/rte.app.mk | 2 +
6 files changed, 93 insertions(+)
create mode 100644 drivers/net/bnx2x/Makefile
@@ -265,6 +265,9 @@ M: John McNamara <john.mcnamara@intel.com>
F: drivers/net/pcap/
F: doc/guides/nics/pcap_ring.rst
+Qlogic/Broadcom bnx2x
+F: drivers/net/bnx2x/
+
Ring PMD
M: Bruce Richardson <bruce.richardson@intel.com>
F: drivers/net/ring/
@@ -229,6 +229,16 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=y
CONFIG_RTE_LIBRTE_ENIC_DEBUG=n
#
+# Compile burst-oriented Broadcom PMD driver
+#
+CONFIG_RTE_LIBRTE_BNX2X_PMD=y
+CONFIG_RTE_LIBRTE_BNX2X_DEBUG_INIT=n
+CONFIG_RTE_LIBRTE_BNX2X_DEBUG=n
+CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n
+CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n
+CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n
+
+#
# Compile burst-oriented VIRTIO PMD driver
#
CONFIG_RTE_LIBRTE_VIRTIO_PMD=y
@@ -46,6 +46,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_RING) += ring
DIRS-$(CONFIG_RTE_LIBRTE_VIRTIO_PMD) += virtio
DIRS-$(CONFIG_RTE_LIBRTE_VMXNET3_PMD) += vmxnet3
DIRS-$(CONFIG_RTE_LIBRTE_PMD_XENVIRT) += xenvirt
+DIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x
include $(RTE_SDK)/mk/rte.sharelib.mk
include $(RTE_SDK)/mk/rte.subdir.mk
new file mode 100644
@@ -0,0 +1,28 @@
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_bnx2x.a
+
+CFLAGS += -O3 -g
+CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -DZLIB_CONST
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_rxtx.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_stats.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_ethdev.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += ecore_sp.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += elink.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_vfpf.c
+SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_DEBUG) += debug.c
+
+# this lib depends upon:
+DEPDIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += lib/librte_eal lib/librte_ether lib/librte_hash
+DEPDIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += lib/librte_mempool lib/librte_mbuf
+
+include $(RTE_SDK)/mk/rte.lib.mk
@@ -144,6 +144,14 @@
#define RTE_PCI_DEV_ID_DECL_ENIC(vend, dev)
#endif
+#ifndef RTE_PCI_DEV_ID_DECL_BNX2X
+#define RTE_PCI_DEV_ID_DECL_BNX2X(vend, dev)
+#endif
+
+#ifndef RTE_PCI_DEV_ID_DECL_BNX2XVF
+#define RTE_PCI_DEV_ID_DECL_BNX2XVF(vend, dev)
+#endif
+
#ifndef PCI_VENDOR_ID_INTEL
/** Vendor ID used by Intel devices */
#define PCI_VENDOR_ID_INTEL 0x8086
@@ -164,6 +172,11 @@
#define PCI_VENDOR_ID_CISCO 0x1137
#endif
+#ifndef PCI_VENDOR_ID_BROADCOM
+/** Vendor ID used by Broadcom devices */
+#define PCI_VENDOR_ID_BROADCOM 0x14E4
+#endif
+
/******************** Physical EM devices from e1000_hw.h ********************/
#define E1000_DEV_ID_82542 0x1000
@@ -565,6 +578,40 @@ RTE_PCI_DEV_ID_DECL_FM10KVF(PCI_VENDOR_ID_INTEL, FM10K_DEV_ID_VF)
RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET)
RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)
+/****************** QLogic devices ******************/
+
+/* Broadcom/QLogic BNX2X */
+#define BNX2X_DEV_ID_57710 0x164e
+#define BNX2X_DEV_ID_57711 0x164f
+#define BNX2X_DEV_ID_57711E 0x1650
+#define BNX2X_DEV_ID_57712 0x1662
+#define BNX2X_DEV_ID_57712_MF 0x1663
+#define BNX2X_DEV_ID_57712_VF 0x166f
+#define BNX2X_DEV_ID_57713 0x1651
+#define BNX2X_DEV_ID_57713E 0x1652
+#define BNX2X_DEV_ID_57800 0x168a
+#define BNX2X_DEV_ID_57800_MF 0x16a5
+#define BNX2X_DEV_ID_57800_VF 0x16a9
+#define BNX2X_DEV_ID_57810 0x168e
+#define BNX2X_DEV_ID_57810_MF 0x16ae
+#define BNX2X_DEV_ID_57810_VF 0x16af
+#define BNX2X_DEV_ID_57811 0x163d
+#define BNX2X_DEV_ID_57811_MF 0x163e
+#define BNX2X_DEV_ID_57811_VF 0x163f
+
+
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57800)
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57800_VF)
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57711)
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57810)
+RTE_PCI_DEV_ID_DECL_BNX2XVF(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57810_VF)
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57811)
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57811_VF)
+#ifdef RTE_LIBRTE_BNX2X_MF_SUPPORT
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57810_MF)
+RTE_PCI_DEV_ID_DECL_BNX2X(PCI_VENDOR_ID_BROADCOM, BNX2X_DEV_ID_57811_MF)
+#endif
+
/*
* Undef all RTE_PCI_DEV_ID_DECL_* here.
*/
@@ -577,5 +624,7 @@ RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)
#undef RTE_PCI_DEV_ID_DECL_I40EVF
#undef RTE_PCI_DEV_ID_DECL_VIRTIO
#undef RTE_PCI_DEV_ID_DECL_VMXNET3
+#undef RTE_PCI_DEV_ID_DECL_BNX2X
+#undef RTE_PCI_DEV_ID_DECL_BNX2XVF
#undef RTE_PCI_DEV_ID_DECL_FM10K
#undef RTE_PCI_DEV_ID_DECL_FM10KVF
@@ -101,6 +101,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_VHOST) += -lfuse
endif
_LDLIBS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += -libverbs
+_LDLIBS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += -lz
_LDLIBS-y += --start-group
@@ -137,6 +138,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_RING) += -lrte_pmd_ring
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_PCAP) += -lrte_pmd_pcap
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_AF_PACKET) += -lrte_pmd_af_packet
_LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_NULL) += -lrte_pmd_null
+_LDLIBS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += -lrte_pmd_bnx2x
endif # ! $(CONFIG_RTE_BUILD_SHARED_LIB)