From patchwork Fri Jul 3 14:03:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Iremonger, Bernard" X-Patchwork-Id: 6069 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 16B1C5A57; Fri, 3 Jul 2015 16:04:13 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 1397E5A43 for ; Fri, 3 Jul 2015 16:04:10 +0200 (CEST) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 03 Jul 2015 07:04:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,400,1432623600"; d="scan'208";a="740082428" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by fmsmga001.fm.intel.com with ESMTP; 03 Jul 2015 07:04:09 -0700 Received: from sivswdev01.ir.intel.com (sivswdev01.ir.intel.com [10.237.217.45]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id t63E48eD010175; Fri, 3 Jul 2015 15:04:08 +0100 Received: from sivswdev01.ir.intel.com (localhost [127.0.0.1]) by sivswdev01.ir.intel.com with ESMTP id t63E48dc026260; Fri, 3 Jul 2015 15:04:08 +0100 Received: (from bairemon@localhost) by sivswdev01.ir.intel.com with id t63E48JI026256; Fri, 3 Jul 2015 15:04:08 +0100 From: Bernard Iremonger To: dev@dpdk.org Date: Fri, 3 Jul 2015 15:03:54 +0100 Message-Id: <1435932240-26064-2-git-send-email-bernard.iremonger@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1435932240-26064-1-git-send-email-bernard.iremonger@intel.com> References: <1435932240-26064-1-git-send-email-bernard.iremonger@intel.com> Subject: [dpdk-dev] [PATCH v6 1/7] i40e: changes to support PCI Port Hotplug X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch depends on the Port Hotplug Framework. It implements the eth_dev_uninit functions for rte_i40e_pmd and rte_i40evf_pmd. Signed-off-by: Bernard Iremonger --- drivers/net/i40e/i40e_ethdev.c | 68 ++++++++++++++++++++++++++++++++++++- drivers/net/i40e/i40e_ethdev_vf.c | 45 ++++++++++++++++++++++++- drivers/net/i40e/i40e_pf.c | 34 ++++++++++++++++++ drivers/net/i40e/i40e_pf.h | 1 + 4 files changed, 146 insertions(+), 2 deletions(-) diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 2ada502..449785b 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -107,6 +107,7 @@ (1UL << RTE_ETH_FLOW_L2_PAYLOAD)) static int eth_i40e_dev_init(struct rte_eth_dev *eth_dev); +static int eth_i40e_dev_uninit(struct rte_eth_dev *eth_dev); static int i40e_dev_configure(struct rte_eth_dev *dev); static int i40e_dev_start(struct rte_eth_dev *dev); static void i40e_dev_stop(struct rte_eth_dev *dev); @@ -268,9 +269,11 @@ static struct eth_driver rte_i40e_pmd = { .pci_drv = { .name = "rte_i40e_pmd", .id_table = pci_id_i40e_map, - .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC | + RTE_PCI_DRV_DETACHABLE, }, .eth_dev_init = eth_i40e_dev_init, + .eth_dev_uninit = eth_i40e_dev_uninit, .dev_private_size = sizeof(struct i40e_adapter), }; @@ -405,6 +408,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev) hw->subsystem_device_id = pci_dev->id.subsystem_device_id; hw->bus.device = pci_dev->addr.devid; hw->bus.func = pci_dev->addr.function; + hw->adapter_stopped = 0; /* Make sure all is clean before doing PF reset */ i40e_clear_hw(hw); @@ -584,6 +588,65 @@ err_get_capabilities: } static int +eth_i40e_dev_uninit(struct rte_eth_dev *dev) +{ + struct rte_pci_device *pci_dev; + struct i40e_hw *hw; + struct i40e_filter_control_settings settings; + int ret; + uint8_t aq_fail = 0; + + PMD_INIT_FUNC_TRACE(); + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return 0; + + hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + pci_dev = dev->pci_dev; + + if (hw->adapter_stopped == 0) + i40e_dev_close(dev); + + dev->dev_ops = NULL; + dev->rx_pkt_burst = NULL; + dev->tx_pkt_burst = NULL; + + /* Disable LLDP */ + ret = i40e_aq_stop_lldp(hw, true, NULL); + if (ret != I40E_SUCCESS) /* Its failure can be ignored */ + PMD_INIT_LOG(INFO, "Failed to stop lldp"); + + /* Clear PXE mode */ + i40e_clear_pxe_mode(hw); + + /* Unconfigure filter control */ + memset(&settings, 0, sizeof(settings)); + ret = i40e_set_filter_control(hw, &settings); + if (ret) + PMD_INIT_LOG(WARNING, "setup_pf_filter_control failed: %d", + ret); + + /* Disable flow control */ + hw->fc.requested_mode = I40E_FC_NONE; + i40e_set_fc(hw, &aq_fail, TRUE); + + /* uninitialize pf host driver */ + i40e_pf_host_uninit(dev); + + rte_free(dev->data->mac_addrs); + dev->data->mac_addrs = NULL; + + /* disable uio intr before callback unregister */ + rte_intr_disable(&(pci_dev->intr_handle)); + + /* register callback func to eal lib */ + rte_intr_callback_unregister(&(pci_dev->intr_handle), + i40e_dev_interrupt_handler, (void *)dev); + + return 0; +} + +static int i40e_dev_configure(struct rte_eth_dev *dev) { struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); @@ -858,6 +921,8 @@ i40e_dev_start(struct rte_eth_dev *dev) struct i40e_vsi *main_vsi = pf->main_vsi; int ret, i; + hw->adapter_stopped = 0; + if ((dev->data->dev_conf.link_duplex != ETH_LINK_AUTONEG_DUPLEX) && (dev->data->dev_conf.link_duplex != ETH_LINK_FULL_DUPLEX)) { PMD_INIT_LOG(ERR, "Invalid link_duplex (%hu) for port %hhu", @@ -965,6 +1030,7 @@ i40e_dev_close(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); i40e_dev_stop(dev); + hw->adapter_stopped = 1; /* Disable interrupt */ i40e_pf_disable_irq0(hw); diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c index f7332e7..fb12d63 100644 --- a/drivers/net/i40e/i40e_ethdev_vf.c +++ b/drivers/net/i40e/i40e_ethdev_vf.c @@ -1146,6 +1146,22 @@ err: } static int +i40evf_uninit_vf(struct rte_eth_dev *dev) +{ + struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); + struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + PMD_INIT_FUNC_TRACE(); + + if (hw->adapter_stopped == 0) + i40evf_dev_close(dev); + rte_free(vf->vf_res); + vf->vf_res = NULL; + + return 0; +} + +static int i40evf_dev_init(struct rte_eth_dev *eth_dev) { struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\ @@ -1175,6 +1191,7 @@ i40evf_dev_init(struct rte_eth_dev *eth_dev) hw->bus.device = eth_dev->pci_dev->addr.devid; hw->bus.func = eth_dev->pci_dev->addr.function; hw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr; + hw->adapter_stopped = 0; if(i40evf_init_vf(eth_dev) != 0) { PMD_INIT_LOG(ERR, "Init vf failed"); @@ -1195,6 +1212,28 @@ i40evf_dev_init(struct rte_eth_dev *eth_dev) return 0; } +static int +i40evf_dev_uninit(struct rte_eth_dev *eth_dev) +{ + PMD_INIT_FUNC_TRACE(); + + if (rte_eal_process_type() != RTE_PROC_PRIMARY) + return -EPERM; + + eth_dev->dev_ops = NULL; + eth_dev->rx_pkt_burst = NULL; + eth_dev->tx_pkt_burst = NULL; + + if (i40evf_uninit_vf(eth_dev) != 0) { + PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed"); + return -1; + } + + rte_free(eth_dev->data->mac_addrs); + eth_dev->data->mac_addrs = NULL; + + return 0; +} /* * virtual function driver struct */ @@ -1202,9 +1241,10 @@ static struct eth_driver rte_i40evf_pmd = { .pci_drv = { .name = "rte_i40evf_pmd", .id_table = pci_id_i40evf_map, - .drv_flags = RTE_PCI_DRV_NEED_MAPPING, + .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE, }, .eth_dev_init = i40evf_dev_init, + .eth_dev_uninit = i40evf_dev_uninit, .dev_private_size = sizeof(struct i40e_vf), }; @@ -1524,6 +1564,8 @@ i40evf_dev_start(struct rte_eth_dev *dev) PMD_INIT_FUNC_TRACE(); + hw->adapter_stopped = 0; + vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, dev->data->nb_tx_queues); @@ -1709,6 +1751,7 @@ i40evf_dev_close(struct rte_eth_dev *dev) struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); i40evf_dev_stop(dev); + hw->adapter_stopped = 1; i40evf_reset_vf(hw); i40e_shutdown_adminq(hw); } diff --git a/drivers/net/i40e/i40e_pf.c b/drivers/net/i40e/i40e_pf.c index b89a1e2..95c960c 100644 --- a/drivers/net/i40e/i40e_pf.c +++ b/drivers/net/i40e/i40e_pf.c @@ -1061,3 +1061,37 @@ fail: return ret; } + +int +i40e_pf_host_uninit(struct rte_eth_dev *dev) +{ + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + struct i40e_hw *hw = I40E_PF_TO_HW(pf); + uint32_t val; + + PMD_INIT_FUNC_TRACE(); + + /** + * return if SRIOV not enabled, VF number not configured or + * no queue assigned. + */ + if ((!hw->func_caps.sr_iov_1_1) || + (pf->vf_num == 0) || + (pf->vf_nb_qps == 0)) + return I40E_SUCCESS; + + /* free memory to store VF structure */ + rte_free(pf->vfs); + pf->vfs = NULL; + + /* Disable irq0 for VFR event */ + i40e_pf_disable_irq0(hw); + + /* Disable VF link status interrupt */ + val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM); + val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; + I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val); + I40E_WRITE_FLUSH(hw); + + return I40E_SUCCESS; +} diff --git a/drivers/net/i40e/i40e_pf.h b/drivers/net/i40e/i40e_pf.h index e08ba49..9c01829 100644 --- a/drivers/net/i40e/i40e_pf.h +++ b/drivers/net/i40e/i40e_pf.h @@ -123,5 +123,6 @@ void i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev, __rte_unused uint32_t retval, uint8_t *msg, uint16_t msglen); int i40e_pf_host_init(struct rte_eth_dev *dev); +int i40e_pf_host_uninit(struct rte_eth_dev *dev); #endif /* _I40E_PF_H_ */