From patchwork Thu Apr 30 15:03:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Helin" X-Patchwork-Id: 4569 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id D8074CC06; Thu, 30 Apr 2015 17:05:00 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id C1523CBFA for ; Thu, 30 Apr 2015 17:04:58 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 30 Apr 2015 08:04:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,677,1422950400"; d="scan'208";a="718492945" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga002.fm.intel.com with ESMTP; 30 Apr 2015 08:04:13 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t3UF49Dp028693; Thu, 30 Apr 2015 23:04:09 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t3UF45OS024013; Thu, 30 Apr 2015 23:04:07 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t3UF450h024009; Thu, 30 Apr 2015 23:04:05 +0800 From: Helin Zhang To: dev@dpdk.org Date: Thu, 30 Apr 2015 23:03:17 +0800 Message-Id: <1430406219-23901-12-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1430406219-23901-1-git-send-email-helin.zhang@intel.com> References: <1429518150-28098-1-git-send-email-helin.zhang@intel.com> <1430406219-23901-1-git-send-email-helin.zhang@intel.com> Cc: monica.kenguva@intel.com, steven.j.murray@intel.com, shannon.nelson@intel.com Subject: [dpdk-dev] [PATCH v2 11/33] i40e/base: check for AQ timeout in aq_rc decode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Decoding the AQ return code is great except when the AQ send timed out and there's no return code set. This changes the handy decoder interface to help catch and properly report the condition as an useful error number rather than returning a misleading '0'. Signed-off-by: Helin Zhang --- lib/librte_pmd_i40e/i40e/i40e_adminq.h | 9 ++++++++- lib/librte_pmd_i40e/i40e/i40e_nvm.c | 33 +++++++++++++++++++++------------ 2 files changed, 29 insertions(+), 13 deletions(-) diff --git a/lib/librte_pmd_i40e/i40e/i40e_adminq.h b/lib/librte_pmd_i40e/i40e/i40e_adminq.h index a8c6afe..d8c1fb6 100644 --- a/lib/librte_pmd_i40e/i40e/i40e_adminq.h +++ b/lib/librte_pmd_i40e/i40e/i40e_adminq.h @@ -35,6 +35,7 @@ POSSIBILITY OF SUCH DAMAGE. #define _I40E_ADMINQ_H_ #include "i40e_osdep.h" +#include "i40e_status.h" #include "i40e_adminq_cmd.h" #define I40E_ADMINQ_DESC(R, i) \ @@ -116,7 +117,7 @@ struct i40e_adminq_info { * i40e_aq_rc_to_posix - convert errors to user-land codes * aq_rc: AdminQ error code to convert **/ -STATIC inline int i40e_aq_rc_to_posix(u16 aq_rc) +STATIC inline int i40e_aq_rc_to_posix(int aq_ret, u16 aq_rc) { int aq_to_posix[] = { 0, /* I40E_AQ_RC_OK */ @@ -144,6 +145,12 @@ STATIC inline int i40e_aq_rc_to_posix(u16 aq_rc) -EFBIG, /* I40E_AQ_RC_EFBIG */ }; + /* aq_rc is invalid if AQ timed out */ + if (aq_ret == I40E_ERR_ADMIN_QUEUE_TIMEOUT) + return -EAGAIN; + + if (aq_rc >= (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0]))) + return -ERANGE; return aq_to_posix[aq_rc]; } diff --git a/lib/librte_pmd_i40e/i40e/i40e_nvm.c b/lib/librte_pmd_i40e/i40e/i40e_nvm.c index e82f2a4..b1afec7 100644 --- a/lib/librte_pmd_i40e/i40e/i40e_nvm.c +++ b/lib/librte_pmd_i40e/i40e/i40e_nvm.c @@ -760,7 +760,8 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw, case I40E_NVMUPD_READ_SA: status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); if (status) { - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status); } else { status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno); i40e_release_nvm(hw); @@ -770,7 +771,8 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw, case I40E_NVMUPD_READ_SNT: status = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); if (status) { - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status); } else { status = i40e_nvmupd_nvm_read(hw, cmd, bytes, perrno); hw->nvmupd_state = I40E_NVMUPD_STATE_READING; @@ -780,7 +782,8 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw, case I40E_NVMUPD_WRITE_ERA: status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); if (status) { - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status); } else { status = i40e_nvmupd_nvm_erase(hw, cmd, perrno); if (status) @@ -793,7 +796,8 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw, case I40E_NVMUPD_WRITE_SA: status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); if (status) { - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status); } else { status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); if (status) @@ -806,7 +810,8 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw, case I40E_NVMUPD_WRITE_SNT: status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); if (status) { - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status); } else { status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno); hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; @@ -816,12 +821,14 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw, case I40E_NVMUPD_CSUM_SA: status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE); if (status) { - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status); } else { status = i40e_update_nvm_checksum(hw); if (status) { *perrno = hw->aq.asq_last_status ? - i40e_aq_rc_to_posix(hw->aq.asq_last_status) : + i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status) : -EIO; i40e_release_nvm(hw); } else { @@ -919,7 +926,8 @@ retry: status = i40e_update_nvm_checksum(hw); if (status) *perrno = hw->aq.asq_last_status ? - i40e_aq_rc_to_posix(hw->aq.asq_last_status) : + i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status) : -EIO; break; @@ -927,7 +935,8 @@ retry: status = i40e_update_nvm_checksum(hw); if (status) { *perrno = hw->aq.asq_last_status ? - i40e_aq_rc_to_posix(hw->aq.asq_last_status) : + i40e_aq_rc_to_posix(status, + hw->aq.asq_last_status) : -EIO; } else { hw->aq.nvm_release_on_done = true; @@ -1092,7 +1101,7 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_read(struct i40e_hw *hw, bytes, last, NULL); DEBUGOUT1("i40e_nvmupd_nvm_read status %d\n", status); if (status != I40E_SUCCESS) - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); return status; } @@ -1122,7 +1131,7 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_erase(struct i40e_hw *hw, last, NULL); DEBUGOUT1("i40e_nvmupd_nvm_erase status %d\n", status); if (status != I40E_SUCCESS) - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); return status; } @@ -1153,7 +1162,7 @@ STATIC enum i40e_status_code i40e_nvmupd_nvm_write(struct i40e_hw *hw, (u16)cmd->data_size, bytes, last, NULL); DEBUGOUT1("i40e_nvmupd_nvm_write status %d\n", status); if (status != I40E_SUCCESS) - *perrno = i40e_aq_rc_to_posix(hw->aq.asq_last_status); + *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); return status; }