From patchwork Thu Feb 26 03:37:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jijiang Liu X-Patchwork-Id: 3745 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 5807F5A44; Thu, 26 Feb 2015 04:38:00 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 266305A44 for ; Thu, 26 Feb 2015 04:37:58 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 25 Feb 2015 19:37:37 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,650,1418112000"; d="scan'208";a="532999544" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga003.jf.intel.com with ESMTP; 25 Feb 2015 19:28:27 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t1Q3bYTB003497; Thu, 26 Feb 2015 11:37:34 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t1Q3bWdB024468; Thu, 26 Feb 2015 11:37:34 +0800 Received: (from jijiangl@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t1Q3bWZZ024464; Thu, 26 Feb 2015 11:37:32 +0800 From: Jijiang Liu To: dev@dpdk.org Date: Thu, 26 Feb 2015 11:37:23 +0800 Message-Id: <1424921844-24162-3-git-send-email-jijiang.liu@intel.com> X-Mailer: git-send-email 1.7.12.2 In-Reply-To: <1424921844-24162-1-git-send-email-jijiang.liu@intel.com> References: <1424921844-24162-1-git-send-email-jijiang.liu@intel.com> Subject: [dpdk-dev] [PATCH v3 2/3] i40e:enable TSO support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch enables i40e TSO feature for both non-tunneling packet and tunneling packet Signed-off-by: Jijiang Liu Signed-off-by: Miroslaw Walukiewicz Signed-off-by: Grzegorz Galkowski --- lib/librte_pmd_i40e/i40e_rxtx.c | 60 +++++++++++++++++++++++++++++++++++--- lib/librte_pmd_i40e/i40e_rxtx.h | 2 + 2 files changed, 57 insertions(+), 5 deletions(-) diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c index d0f84c8..9c7be6f 100644 --- a/lib/librte_pmd_i40e/i40e_rxtx.c +++ b/lib/librte_pmd_i40e/i40e_rxtx.c @@ -506,6 +506,13 @@ i40e_txd_enable_checksum(uint64_t ol_flags, << I40E_TX_DESC_LENGTH_IPLEN_SHIFT; } + if (ol_flags & PKT_TX_TCP_SEG) { + *td_cmd |= I40E_TX_DESC_CMD_L4T_EOFT_TCP; + *td_offset |= (tx_offload.l4_len >> 2) + << I40E_TX_DESC_LENGTH_L4_FC_LEN_SHIFT; + return; + } + /* Enable L4 checksum offloads */ switch (ol_flags & PKT_TX_L4_MASK) { case PKT_TX_TCP_CKSUM: @@ -1154,7 +1161,7 @@ i40e_calc_context_desc(uint64_t flags) { uint64_t mask = 0ULL; - mask |= PKT_TX_OUTER_IP_CKSUM; + mask |= (PKT_TX_OUTER_IP_CKSUM | PKT_TX_TCP_SEG); #ifdef RTE_LIBRTE_IEEE1588 mask |= PKT_TX_IEEE1588_TMST; @@ -1165,6 +1172,39 @@ i40e_calc_context_desc(uint64_t flags) return 0; } +/* set i40e TSO context descriptor */ +static inline uint64_t +i40e_set_tso_ctx(struct rte_mbuf *mbuf, union i40e_tx_offload tx_offload) +{ + uint64_t ctx_desc = 0; + uint32_t cd_cmd, hdr_len, cd_tso_len; + + if (!tx_offload.l4_len) { + PMD_DRV_LOG(DEBUG, "L4 length set to 0"); + return ctx_desc; + } + + /** + * in case of tunneling packet, the outer_l2_len and + * outer_l3_len must be 0. + */ + hdr_len = tx_offload.outer_l2_len + + tx_offload.outer_l3_len + + tx_offload.l2_len + + tx_offload.l3_len + + tx_offload.l4_len; + + cd_cmd = I40E_TX_CTX_DESC_TSO; + cd_tso_len = mbuf->pkt_len - hdr_len; + ctx_desc |= ((uint64_t)cd_cmd << I40E_TXD_CTX_QW1_CMD_SHIFT) | + ((uint64_t)cd_tso_len << + I40E_TXD_CTX_QW1_TSO_LEN_SHIFT) | + ((uint64_t)mbuf->tso_segsz << + I40E_TXD_CTX_QW1_MSS_SHIFT); + + return ctx_desc; +} + uint16_t i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) { @@ -1214,6 +1254,8 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) tx_offload.l3_len = tx_pkt->l3_len; tx_offload.outer_l2_len = tx_pkt->outer_l2_len; tx_offload.outer_l3_len = tx_pkt->outer_l3_len; + tx_offload.l4_len = tx_pkt->l4_len; + tx_offload.tso_segsz = tx_pkt->tso_segsz; /* Calculate the number of context descriptors needed. */ nb_ctx = i40e_calc_context_desc(ol_flags); @@ -1282,12 +1324,20 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) rte_pktmbuf_free_seg(txe->mbuf); txe->mbuf = NULL; } -#ifdef RTE_LIBRTE_IEEE1588 - if (ol_flags & PKT_TX_IEEE1588_TMST) + + /* TSO enabled means no timestamp */ + if (ol_flags & PKT_TX_TCP_SEG) cd_type_cmd_tso_mss |= - ((uint64_t)I40E_TX_CTX_DESC_TSYN << - I40E_TXD_CTX_QW1_CMD_SHIFT); + i40e_set_tso_ctx(tx_pkt, tx_offload); + else { +#ifdef RTE_LIBRTE_IEEE1588 + if (ol_flags & PKT_TX_IEEE1588_TMST) + cd_type_cmd_tso_mss |= + ((uint64_t)I40E_TX_CTX_DESC_TSYN << + I40E_TXD_CTX_QW1_CMD_SHIFT); #endif + } + ctx_txd->tunneling_params = rte_cpu_to_le_32(cd_tunneling_params); ctx_txd->l2tag2 = rte_cpu_to_le_16(cd_l2tag2); diff --git a/lib/librte_pmd_i40e/i40e_rxtx.h b/lib/librte_pmd_i40e/i40e_rxtx.h index abd8fa2..5b2984a 100644 --- a/lib/librte_pmd_i40e/i40e_rxtx.h +++ b/lib/librte_pmd_i40e/i40e_rxtx.h @@ -160,6 +160,8 @@ union i40e_tx_offload { struct { uint64_t l2_len:7; /**< L2 (MAC) Header Length. */ uint64_t l3_len:9; /**< L3 (IP) Header Length. */ + uint64_t l4_len:8; /**< L4 Header Length. */ + uint64_t tso_segsz:16; /**< TCP TSO segment size */ uint64_t outer_l2_len:8; /**< outer L2 Header Length */ uint64_t outer_l3_len:16; /**< outer L3 Header Length */ };