From patchwork Mon Jan 26 03:43:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jijiang Liu X-Patchwork-Id: 2519 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id EF9305AB8; Mon, 26 Jan 2015 04:43:54 +0100 (CET) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 2DA255AB1 for ; Mon, 26 Jan 2015 04:43:45 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 25 Jan 2015 19:43:44 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,466,1418112000"; d="scan'208";a="667420733" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga002.fm.intel.com with ESMTP; 25 Jan 2015 19:43:42 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t0Q3hebr026537; Mon, 26 Jan 2015 11:43:40 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t0Q3hbe2010976; Mon, 26 Jan 2015 11:43:39 +0800 Received: (from jijiangl@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t0Q3hbs2010972; Mon, 26 Jan 2015 11:43:37 +0800 From: Jijiang Liu To: dev@dpdk.org Date: Mon, 26 Jan 2015 11:43:24 +0800 Message-Id: <1422243805-10906-6-git-send-email-jijiang.liu@intel.com> X-Mailer: git-send-email 1.7.12.2 In-Reply-To: <1422243805-10906-1-git-send-email-jijiang.liu@intel.com> References: <1422243805-10906-1-git-send-email-jijiang.liu@intel.com> Subject: [dpdk-dev] [PATCH 5/6] i40e:support GRE tunnel TX checksum offload X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Support NVGRE TX checksum offload, which includes - outer L3(IP) checksum offload - inner L3(IP) checksum offload - inner L4(UDP, TCP and SCTP) checksum offload In addition, for GRE packet, the L4 tunnel type should be I40E_TXD_CTX_GRE_TUNNELING. Signed-off-by: Jijiang Liu --- lib/librte_pmd_i40e/i40e_rxtx.c | 13 ++++++++++--- 1 files changed, 10 insertions(+), 3 deletions(-) diff --git a/lib/librte_pmd_i40e/i40e_rxtx.c b/lib/librte_pmd_i40e/i40e_rxtx.c index 2beae3c..6c1e324 100644 --- a/lib/librte_pmd_i40e/i40e_rxtx.c +++ b/lib/librte_pmd_i40e/i40e_rxtx.c @@ -476,8 +476,15 @@ i40e_txd_enable_checksum(uint64_t ol_flags, return; } - /* UDP tunneling packet TX checksum offload */ - if (unlikely(ol_flags & PKT_TX_UDP_TUNNEL_PKT)) { + /* UDP/GRE tunneling packet TX checksum offload */ + if (unlikely(ol_flags & (PKT_TX_UDP_TUNNEL_PKT | + PKT_TX_GRE_TUNNEL_PKT))) { + uint32_t tunnel_flag; + + if (ol_flags & PKT_TX_UDP_TUNNEL_PKT) + tunnel_flag = I40E_TXD_CTX_UDP_TUNNELING; + else + tunnel_flag = I40E_TXD_CTX_GRE_TUNNELING; *td_offset |= (outer_l2_len >> 1) << I40E_TX_DESC_LENGTH_MACLEN_SHIFT; @@ -492,7 +499,7 @@ i40e_txd_enable_checksum(uint64_t ol_flags, /* Now set the ctx descriptor fields */ *cd_tunneling |= (outer_l3_len >> 2) << I40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT | - I40E_TXD_CTX_UDP_TUNNELING | + tunnel_flag | (l2_len >> 1) << I40E_TXD_CTX_QW0_NATLEN_SHIFT;