From patchwork Mon Dec 29 01:41:28 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Helin" X-Patchwork-Id: 2176 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 670B6594E; Mon, 29 Dec 2014 02:41:46 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id BB2145921 for ; Mon, 29 Dec 2014 02:41:41 +0100 (CET) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 28 Dec 2014 17:41:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,658,1413270000"; d="scan'208";a="643875140" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga001.fm.intel.com with ESMTP; 28 Dec 2014 17:41:37 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id sBT1fXC1003224; Mon, 29 Dec 2014 09:41:33 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id sBT1fVJl022991; Mon, 29 Dec 2014 09:41:33 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id sBT1fU37022987; Mon, 29 Dec 2014 09:41:30 +0800 From: Helin Zhang To: dev@dpdk.org Date: Mon, 29 Dec 2014 09:41:28 +0800 Message-Id: <1419817288-22957-1-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1419405248-14158-1-git-send-email-helin.zhang@intel.com> References: <1419405248-14158-1-git-send-email-helin.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2] i40e: workaround for XL710 performance X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On XL710, performance number is far from the expectation on recent firmware versions, if promiscuous mode is disabled, or promiscuous mode is enabled and port MAC address is equal to the packet destination MAC address. The fix for this issue may not be integrated in the following firmware version. So the workaround in software driver is needed. For XL710, it needs to modify the initial values of 3 internal only registers, which are the same as X710. Note that the values for X710 and XL710 registers could be different, and the workaround can be removed when it is fixed in firmware in the future. Signed-off-by: Helin Zhang Acked-by: Jingjing Wu Acked-by: Jingjing Wu --- lib/librte_pmd_i40e/i40e_ethdev.c | 44 ++++++++++++++++++++++++++------------- 1 file changed, 30 insertions(+), 14 deletions(-) v2 changes: * Supported modifying the address of 0x269FBC of XL710 during initialization, to fix the minor performance gap to expectation. That means XL710 can meet the performance expectation with this workaround. diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c index b47a3d2..8982920 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.c +++ b/lib/librte_pmd_i40e/i40e_ethdev.c @@ -5327,38 +5327,54 @@ i40e_debug_read_register(struct i40e_hw *hw, uint32_t addr, uint64_t *val) /* * On X710, performance number is far from the expectation on recent firmware - * versions. The fix for this issue may not be integrated in the following + * versions; on XL710, performance number is also far from the expectation on + * recent firmware versions, if promiscuous mode is disabled, or promiscuous + * mode is enabled and port MAC address is equal to the packet destination MAC + * address. The fix for this issue may not be integrated in the following * firmware version. So the workaround in software driver is needed. It needs - * to modify the initial values of 3 internal only registers. Note that the + * to modify the initial values of 3 internal only registers for both X710 and + * XL710. Note that the values for X710 or XL710 could be different, and the * workaround can be removed when it is fixed in firmware in the future. */ -static void -i40e_configure_registers(struct i40e_hw *hw) -{ + +/* For both X710 and XL710 */ +#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE 0x10000200 #define I40E_GL_SWR_PRI_JOIN_MAP_0 0x26CE00 + +#define I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE 0x011f0200 #define I40E_GL_SWR_PRI_JOIN_MAP_2 0x26CE08 + +/* For X710 */ +#define I40E_GL_SWR_PM_UP_THR_EF_VALUE 0x03030303 +/* For XL710 */ +#define I40E_GL_SWR_PM_UP_THR_SF_VALUE 0x06060606 #define I40E_GL_SWR_PM_UP_THR 0x269FBC -#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE 0x10000200 -#define I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE 0x011f0200 -#define I40E_GL_SWR_PM_UP_THR_VALUE 0x03030303 - static const struct { +static void +i40e_configure_registers(struct i40e_hw *hw) +{ + static struct { uint32_t addr; uint64_t val; } reg_table[] = { {I40E_GL_SWR_PRI_JOIN_MAP_0, I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE}, {I40E_GL_SWR_PRI_JOIN_MAP_2, I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE}, - {I40E_GL_SWR_PM_UP_THR, I40E_GL_SWR_PM_UP_THR_VALUE}, + {I40E_GL_SWR_PM_UP_THR, 0}, /* Compute value dynamically */ }; uint64_t reg; uint32_t i; int ret; - /* Below fix is for X710 only */ - if (i40e_is_40G_device(hw->device_id)) - return; - for (i = 0; i < RTE_DIM(reg_table); i++) { + if (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) { + if (i40e_is_40G_device(hw->device_id)) /* For XL710 */ + reg_table[i].val = + I40E_GL_SWR_PM_UP_THR_SF_VALUE; + else /* For X710 */ + reg_table[i].val = + I40E_GL_SWR_PM_UP_THR_EF_VALUE; + } + ret = i40e_debug_read_register(hw, reg_table[i].addr, ®); if (ret < 0) { PMD_DRV_LOG(ERR, "Failed to read from 0x%"PRIx32,