From patchwork Wed Dec 24 02:56:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ouyang Changchun X-Patchwork-Id: 2144 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id ACE0E95FF; Wed, 24 Dec 2014 03:57:17 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 8CCFB95EE for ; Wed, 24 Dec 2014 03:57:05 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 23 Dec 2014 18:57:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,636,1413270000"; d="scan'208";a="659338446" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 23 Dec 2014 18:57:03 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id sBO2v1XL017377; Wed, 24 Dec 2014 10:57:01 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id sBO2uxsu009758; Wed, 24 Dec 2014 10:57:01 +0800 Received: (from couyang@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id sBO2uxFD009754; Wed, 24 Dec 2014 10:56:59 +0800 From: Ouyang Changchun To: dev@dpdk.org Date: Wed, 24 Dec 2014 10:56:46 +0800 Message-Id: <1419389808-9559-5-git-send-email-changchun.ouyang@intel.com> X-Mailer: git-send-email 1.7.12.2 In-Reply-To: <1419389808-9559-1-git-send-email-changchun.ouyang@intel.com> References: <1418612225-6095-1-git-send-email-changchun.ouyang@intel.com> <1419389808-9559-1-git-send-email-changchun.ouyang@intel.com> Subject: [dpdk-dev] [PATCH v2 4/6] ether: Check VMDq RSS mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Check multiple queues mode for VMDq RSS, handle it correctly instead of returning an error; Also remove the limitation of per pool queue number has max value of 1, because the per pool queue number could be 2 or 4 if it is VMDq RSS mode; The number of rxq specified in config will determine the multiple queues mode for VMDq RSS. Signed-off-by: Changchun Ouyang --- lib/librte_ether/rte_ethdev.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c index 95f2ceb..59ff325 100644 --- a/lib/librte_ether/rte_ethdev.c +++ b/lib/librte_ether/rte_ethdev.c @@ -510,8 +510,7 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, if (RTE_ETH_DEV_SRIOV(dev).active != 0) { /* check multi-queue mode */ - if ((dev_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) || - (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) || + if ((dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB) || (dev_conf->rxmode.mq_mode == ETH_MQ_RX_DCB_RSS) || (dev_conf->txmode.mq_mode == ETH_MQ_TX_DCB)) { /* SRIOV only works in VMDq enable mode */ @@ -525,7 +524,6 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, } switch (dev_conf->rxmode.mq_mode) { - case ETH_MQ_RX_VMDQ_RSS: case ETH_MQ_RX_VMDQ_DCB: case ETH_MQ_RX_VMDQ_DCB_RSS: /* DCB/RSS VMDQ in SRIOV mode, not implement yet */ @@ -534,6 +532,39 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, "unsupported VMDQ mq_mode rx %u\n", port_id, dev_conf->rxmode.mq_mode); return (-EINVAL); + case ETH_MQ_RX_RSS: + PMD_DEBUG_TRACE("ethdev port_id=%" PRIu8 + " SRIOV active, " + "Rx mq mode is changed from:" + "mq_mode %u into VMDQ mq_mode %u\n", + port_id, + dev_conf->rxmode.mq_mode, + dev->data->dev_conf.rxmode.mq_mode); + case ETH_MQ_RX_VMDQ_RSS: + dev->data->dev_conf.rxmode.mq_mode = ETH_MQ_RX_VMDQ_RSS; + if (nb_rx_q < RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool) { + switch (nb_rx_q) { + case 1: + case 2: + RTE_ETH_DEV_SRIOV(dev).active = + ETH_64_POOLS; + break; + case 4: + RTE_ETH_DEV_SRIOV(dev).active = + ETH_32_POOLS; + break; + default: + PMD_DEBUG_TRACE("ethdev port_id=%d" + " SRIOV active, " + "queue number invalid\n", + port_id); + return -EINVAL; + } + RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = nb_rx_q; + RTE_ETH_DEV_SRIOV(dev).def_pool_q_idx = + dev->pci_dev->max_vfs * nb_rx_q; + } + break; default: /* ETH_MQ_RX_VMDQ_ONLY or ETH_MQ_RX_NONE */ /* if nothing mq mode configure, use default scheme */ dev->data->dev_conf.rxmode.mq_mode = ETH_MQ_RX_VMDQ_ONLY; @@ -553,8 +584,6 @@ rte_eth_dev_check_mq_mode(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, default: /* ETH_MQ_TX_VMDQ_ONLY or ETH_MQ_TX_NONE */ /* if nothing mq mode configure, use default scheme */ dev->data->dev_conf.txmode.mq_mode = ETH_MQ_TX_VMDQ_ONLY; - if (RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool > 1) - RTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = 1; break; }